riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Add "check -assert" to equiv_opt 

Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
This commit is contained in:
Claire Xenia Wolf 2021-05-04 19:02:37 +02:00 committed by Jannis Harder
parent f0478c520d
commit 0516307637
1 changed files with 13 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
passes/equiv/equiv_opt.cc
View File

@ -60,13 +60,16 @@ struct EquivOptPass:public ScriptPass
log(" -undef\n");
log(" enable modelling of undef states during equiv_induct.\n");
log("\n");
log(" -nocheck\n");
log(" disable running check before and after the command under test.\n");
log("\n");
log("The following commands are executed by this verification command:\n");
help_script();
log("\n");
}
std::string command, techmap_opts, make_opts;
bool assert, undef, multiclock, async2sync;
bool assert, undef, multiclock, async2sync, nocheck;
void clear_flags() override
{
@ -77,6 +80,7 @@ struct EquivOptPass:public ScriptPass
undef = false;
multiclock = false;
async2sync = false;
nocheck = false;
}
void execute(std::vector < std::string > args, RTLIL::Design * design) override
@ -110,6 +114,10 @@ struct EquivOptPass:public ScriptPass
undef = true;
continue;
}
if (args[argidx] == "-nocheck") {
nocheck = true;
continue;
}
if (args[argidx] == "-multiclock") {
multiclock = true;
continue;
@ -153,10 +161,14 @@ struct EquivOptPass:public ScriptPass
if (check_label("run_pass")) {
run("hierarchy -auto-top");
run("design -save preopt");
if (!nocheck)
run("check -assert", "(unless -nocheck)");
if (help_mode)
run("[command]");
else
run(command);
if (!nocheck)
run("check -assert", "(unless -nocheck)");
run("design -stash postopt");
}