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write_verilog: emit zero width parameters as `.PARAM()`.

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Catherine 2024-01-11 10:53:30 +00:00 committed by Dag Lem
parent 3ed9030eb4
commit 0486f61a35
1 changed files with 2 additions and 1 deletions
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3
backends/verilog/verilog_backend.cc
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@ -1830,7 +1830,8 @@ void dump_cell(std::ostream &f, std::string indent, RTLIL::Cell *cell)
if (it != cell->parameters.begin()) if (it != cell->parameters.begin())
f << stringf(","); f << stringf(",");
f << stringf("\n%s .%s(", indent.c_str(), id(it->first).c_str()); f << stringf("\n%s .%s(", indent.c_str(), id(it->first).c_str());
dump_const(f, it->second); if (it->second.size() > 0)
dump_const(f, it->second);
f << stringf(")"); f << stringf(")");
} }
f << stringf("\n%s" ")", indent.c_str()); f << stringf("\n%s" ")", indent.c_str());