mirror of https://github.com/YosysHQ/yosys.git
Wrapped functions that use unsigned int or type_t as types
This commit is contained in:
Benedikt Tutzer
parent
4acb29db0c
commit
038caab4e0
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@ -69,20 +69,29 @@ namespace YOSYS_PYTHON {
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}
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//WRAPPED static inline int get_reference(int idx)
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static inline int get_reference(int idx);
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static int get_reference(int idx);
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//WRAPPED static inline void put_reference(int idx)
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static inline void put_reference(int idx);
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static void put_reference(int idx);
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//WRAPPED std::string str() const {
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std::string str();
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//WRAPPED std::string substr(size_t pos = 0, size_t len = std::string::npos) const {
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std::string substr(size_t pos = 0, size_t len = std::string::npos);
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//WRAPPED size_t size() const {
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size_t size();
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//WRAPPED bool empty() const {
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bool empty();
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//WRAPPED void clear() {
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void clear();
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//WRAPPED unsigned int hash() const {
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unsigned int hash();
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//WRAPPED bool in(IdString rhs) const { return *this == rhs; }
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bool in_IdString(IdString *rhs);
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@ -144,7 +153,7 @@ namespace YOSYS_PYTHON {
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std::string decode_string();
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//WRAPPED inline int size() const { return bits.size(); }
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inline int size();
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int size();
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//WRAPPED bool is_fully_zero() const;
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bool is_fully_zero();
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@ -159,7 +168,10 @@ namespace YOSYS_PYTHON {
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bool is_fully_undef();
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//WRAPPED inline RTLIL::Const extract(int offset, int len = 1, RTLIL::State padding = RTLIL::State::S0) const {
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inline Const extract(int offset, int len = 1, State padding = RTLIL::State::S0);
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Const extract(int offset, int len = 1, State padding = RTLIL::State::S0);
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//WRAPPED inline unsigned int hash() const {
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unsigned int hash();
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bool operator<(Const rhs) { return get_cpp_obj() <rhs.get_cpp_obj(); }
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@ -368,6 +380,9 @@ namespace YOSYS_PYTHON {
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return ref_obj;
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}
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//WRAPPED unsigned int hash() const;
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unsigned int hash();
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bool operator<(SigBit rhs) { return get_cpp_obj() <rhs.get_cpp_obj(); }
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bool operator==(SigBit rhs) { return get_cpp_obj() ==rhs.get_cpp_obj(); }
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@ -404,11 +419,14 @@ namespace YOSYS_PYTHON {
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return ref_obj;
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}
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//WRAPPED size_t get_hash() const {
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size_t get_hash();
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//WRAPPED inline int size() const { return width_; }
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inline int size();
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int size();
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//WRAPPED inline bool empty() const { return width_ == 0; }
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inline bool empty();
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bool empty();
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//WRAPPED void replace(const RTLIL::SigSpec &pattern, const RTLIL::SigSpec &with);
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void replace_SigSpec_SigSpec(SigSpec *pattern, SigSpec *with);
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@ -468,7 +486,7 @@ namespace YOSYS_PYTHON {
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bool is_chunk();
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//WRAPPED inline bool is_bit() const { return width_ == 1; }
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inline bool is_bit();
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bool is_bit();
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//WRAPPED bool is_fully_const() const;
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bool is_fully_const();
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@ -524,6 +542,9 @@ namespace YOSYS_PYTHON {
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//WRAPPED static bool parse_rhs(const RTLIL::SigSpec &lhs, RTLIL::SigSpec &sig, RTLIL::Module *module, std::string str);
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static bool parse_rhs(SigSpec *lhs, SigSpec *sig, Module *module, std::string str);
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//WRAPPED unsigned int hash() const { if(!hash_) updhash(); return hash_; };
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unsigned int hash();
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//WRAPPED void check() const;
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void check();
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@ -558,6 +579,9 @@ namespace YOSYS_PYTHON {
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return NULL;
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}
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int hash();
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//WRAPPED bool hasPort(RTLIL::IdString portname) const;
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bool hasPort(IdString *portname);
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@ -618,6 +642,9 @@ namespace YOSYS_PYTHON {
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return ret;
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return NULL;
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}
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int hash();
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};
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std::ostream &operator<<(std::ostream &ostr, const Wire &ref)
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@ -646,6 +673,9 @@ namespace YOSYS_PYTHON {
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return ret;
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return NULL;
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}
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int hash();
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};
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std::ostream &operator<<(std::ostream &ostr, const Memory &ref)
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@ -707,6 +737,9 @@ namespace YOSYS_PYTHON {
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void register_monitor(Monitor* const m);
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int hash();
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//WRAPPED void connect(const RTLIL::SigSig &conn);
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void connect_SigSig(PyObject *conn);
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@ -1210,6 +1243,9 @@ namespace YOSYS_PYTHON {
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void register_monitor(Monitor* const m);
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int hash();
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//WRAPPED RTLIL::Module *module(RTLIL::IdString name);
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Module module(IdString *name);
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@ -1725,6 +1761,18 @@ namespace YOSYS_PYTHON {
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return this->get_cpp_obj()->str();
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}
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//WRAPPED std::string substr(size_t pos = 0, size_t len = std::string::npos) const {
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std::string IdString::substr(size_t pos, size_t len)
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{
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return this->get_cpp_obj()->substr(pos, len);
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}
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//WRAPPED size_t size() const {
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size_t IdString::size()
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{
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return this->get_cpp_obj()->size();
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}
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//WRAPPED bool empty() const {
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bool IdString::empty()
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{
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@ -1737,6 +1785,12 @@ namespace YOSYS_PYTHON {
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this->get_cpp_obj()->clear();
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}
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//WRAPPED unsigned int hash() const {
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unsigned int IdString::hash()
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{
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return this->get_cpp_obj()->hash();
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}
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//WRAPPED bool in(IdString rhs) const { return *this == rhs; }
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bool IdString::in_IdString(IdString *rhs)
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{
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@ -1825,6 +1879,12 @@ namespace YOSYS_PYTHON {
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return Const(this->get_cpp_obj()->extract(offset, len, padding));
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}
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//WRAPPED inline unsigned int hash() const {
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inline unsigned int Const::hash()
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{
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return this->get_cpp_obj()->hash();
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}
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//WRAPPED RTLIL::CaseRule *clone() const;
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CaseRule CaseRule::clone()
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{
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@ -1855,6 +1915,18 @@ namespace YOSYS_PYTHON {
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return SigChunk(this->get_cpp_obj()->extract(offset, length));
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}
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//WRAPPED unsigned int hash() const;
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unsigned int SigBit::hash()
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{
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return this->get_cpp_obj()->hash();
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}
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//WRAPPED size_t get_hash() const {
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size_t SigSpec::get_hash()
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{
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return this->get_cpp_obj()->get_hash();
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}
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//WRAPPED inline int size() const { return width_; }
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inline int SigSpec::size()
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{
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@ -2111,12 +2183,24 @@ namespace YOSYS_PYTHON {
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return Yosys::RTLIL::SigSpec::parse_rhs(*lhs->get_cpp_obj(), *sig->get_cpp_obj(), module->get_cpp_obj(), str);
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}
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//WRAPPED unsigned int hash() const { if(!hash_) updhash(); return hash_; };
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unsigned int SigSpec::hash()
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{
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return this->get_cpp_obj()->hash();
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}
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//WRAPPED void check() const;
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void SigSpec::check()
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{
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this->get_cpp_obj()->check();
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}
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int Cell::hash()
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{
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return this->get_cpp_obj()->hash();
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}
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//WRAPPED bool hasPort(RTLIL::IdString portname) const;
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bool Cell::hasPort(IdString *portname)
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{
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@ -2183,6 +2267,24 @@ namespace YOSYS_PYTHON {
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return this->get_cpp_obj()->has_keep_attr();
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}
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int Wire::hash()
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{
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return this->get_cpp_obj()->hash();
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}
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int Memory::hash()
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{
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return this->get_cpp_obj()->hash();
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}
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int Module::hash()
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{
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return this->get_cpp_obj()->hash();
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}
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//WRAPPED void connect(const RTLIL::SigSig &conn);
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void Module::connect_SigSig(PyObject* conn)
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{
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@ -3096,6 +3198,12 @@ namespace YOSYS_PYTHON {
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return SigSpec(this->get_cpp_obj()->Initstate(*name->get_cpp_obj(), src));
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}
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//WRAPPED unsigned int hash() const { return hashidx_; }
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unsigned int Design::hash()
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{
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return this->get_cpp_obj()->hash();
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}
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//WRAPPED RTLIL::Module *module(RTLIL::IdString name);
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Module Design::module(IdString *name)
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{
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@ -3284,8 +3392,11 @@ namespace YOSYS_PYTHON {
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.def("get_reference", &IdString::get_reference)
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.def("put_reference", &IdString::put_reference)
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.def("str", &IdString::str)
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.def("substr", &IdString::substr)
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.def("size", &IdString::size)
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.def("empty", &IdString::empty)
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.def("clear", &IdString::clear)
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.def("hash", &IdString::hash)
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.def("in_IdString", &IdString::in_IdString)
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.def("in_std_string", &IdString::in_std_string)
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.def("in_pool_IdString", &IdString::in_pool_IdString)
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@ -3308,6 +3419,7 @@ namespace YOSYS_PYTHON {
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.def("is_fully_def", &Const::is_fully_def)
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.def("is_fully_undef", &Const::is_fully_undef)
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.def("extract", &Const::extract)
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.def("hash", &Const::hash)
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.def(self < self)
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.def(self == self)
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.def(self != self)
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@ -3349,6 +3461,7 @@ namespace YOSYS_PYTHON {
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class_<SigBit>("SigBit")
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.def(boost::python::self_ns::str(boost::python::self_ns::self))
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.def(boost::python::self_ns::repr(boost::python::self_ns::self))
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.def("hash", &SigBit::hash)
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.def(self < self)
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.def(self == self)
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.def(self != self)
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@ -3357,6 +3470,7 @@ namespace YOSYS_PYTHON {
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class_<SigSpec>("SigSpec")
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.def(boost::python::self_ns::str(boost::python::self_ns::self))
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.def(boost::python::self_ns::repr(boost::python::self_ns::self))
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.def("get_hash", &SigSpec::get_hash)
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.def("size", &SigSpec::size)
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.def("empty", &SigSpec::empty)
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.def("replace_SigSpec_SigSpec", &SigSpec::replace_SigSpec_SigSpec)
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@ -3397,6 +3511,7 @@ namespace YOSYS_PYTHON {
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.def("parse", &SigSpec::parse)
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.def("parse_sel", &SigSpec::parse_sel)
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.def("parse_rhs", &SigSpec::parse_rhs)
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.def("hash", &SigSpec::hash)
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.def("check", &SigSpec::check)
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.def(self < self)
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.def(self == self)
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@ -3406,6 +3521,7 @@ namespace YOSYS_PYTHON {
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class_<Cell>("Cell", no_init)
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.def(boost::python::self_ns::str(boost::python::self_ns::self))
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.def(boost::python::self_ns::repr(boost::python::self_ns::self))
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.def("hash", &Cell::hash)
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.def("hasPort", &Cell::hasPort)
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.def("unsetPort", &Cell::unsetPort)
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.def("setPort", &Cell::setPort)
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@ -3422,11 +3538,13 @@ namespace YOSYS_PYTHON {
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class_<Wire>("Wire", no_init)
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.def(boost::python::self_ns::str(boost::python::self_ns::self))
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.def(boost::python::self_ns::repr(boost::python::self_ns::self))
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.def("hash", &Wire::hash)
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;
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class_<Memory>("Memory", no_init)
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.def(boost::python::self_ns::str(boost::python::self_ns::self))
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.def(boost::python::self_ns::repr(boost::python::self_ns::self))
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.def("hash", &Memory::hash)
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;
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class_<Module>("Module")
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@ -3435,6 +3553,7 @@ namespace YOSYS_PYTHON {
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.def("get_cells", &Module::get_cells)
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.def("get_wires", &Module::get_wires)
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.def("register_monitor", &Module::register_monitor)
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.def("hash", &Module::hash)
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.def("connect_SigSig", &Module::connect_SigSig)
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.def("connect_SigSpec_SigSpec", &Module::connect_SigSpec_SigSpec)
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.def("new_connections", &Module::new_connections)
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@ -3593,6 +3712,7 @@ namespace YOSYS_PYTHON {
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.def("get_modules", &Design::get_modules)
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.def("run", &Design::run)
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.def("register_monitor", &Design::register_monitor)
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.def("hash", &Design::hash)
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.def("module", &Design::module)
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.def("has", &Design::has)
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.def("add", &Design::add)
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