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abc9_ops: -prep_xaiger exclude (* abc9_keep *) wires from toposort

This commit is contained in:
Eddie Hung 2020-05-25 16:40:53 -07:00
parent 1826370b3a
commit 00c5ceb1f2
1 changed files with 4 additions and 2 deletions
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6
passes/techmap/abc9_ops.cc
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@ -719,8 +719,10 @@ void prep_xaiger(RTLIL::Module *module, bool dff)
bit_users[bit].insert(cell->name); bit_users[bit].insert(cell->name);
if (cell->output(conn.first) && !abc9_flop) if (cell->output(conn.first) && !abc9_flop)
for (auto bit : sigmap(conn.second)) for (const auto &chunk : conn.second.chunks())
bit_drivers[bit].insert(cell->name); if (!chunk.wire->get_bool_attribute(ID::abc9_keep))
for (auto b : sigmap(SigSpec(chunk)))
bit_drivers[b].insert(cell->name);
} }
toposort.node(cell->name); toposort.node(cell->name);
} }