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10 lines
259 B
Plaintext
10 lines
259 B
Plaintext
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read_verilog -sv <<EOT
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module test_logic_param();
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parameter logic a = 0;
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parameter logic [31:0] e = 0;
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parameter logic signed b = 0;
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parameter logic unsigned c = 0;
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parameter logic unsigned [31:0] d = 0;
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endmodule
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EOT
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