yosys/docs/source/code_examples/selections/select.ys

read_verilog select.v
prep -top test

cd test
select -set cone_a state_a %ci*:-$dff
select -set cone_b state_b %ci*:-$dff
select -set cone_ab @cone_a @cone_b %i
show -prefix select -format dot -notitle \
     -color red @cone_ab -color magenta @cone_a \
     -color blue @cone_b
Progress in presentation 2014-02-20 05:46:29 -06:00			`read_verilog select.v`
docs: Tidying image generation Makefiles now have `clean` target. Also fixed top level makefile calls to images directory. More yosys scripts instead of inline yosys commands in makefiles (which also means they can be included in the accompanying document when talking about the image generated). Fixed another couple image generators that were still outputting pdf directly. Fixed some hanging image references which hadn't been updated. Adjusted some text related to images, and included a couple more intermediate images on `memdemo`. 2023-11-14 22:39:37 -06:00			`prep -top test`

presentation progress 2014-02-06 07:01:43 -06:00			`cd test`
			`select -set cone_a state_a %ci*:-$dff`
			`select -set cone_b state_b %ci*:-$dff`
			`select -set cone_ab @cone_a @cone_b %i`
docs: moving code examples Code now resides in `docs/source/code_examples`. `CHAPTER_Prog` -> `stubnets` `APPNOTE_011_Design_Investigation` -> `selections` and `show` `resources/PRESENTATION_Intro` -> `intro` `resources/PRESENTATION_ExSyn` -> `synth_flow` `resources/PRESENTATION_ExAdv` -> `techmap`, `macc`, and `selections` `resources/PRESENTATION_ExOth` -> `scrambler` and `axis` Note that generated images are not yet configured to build from the new code locations. 2023-11-13 17:55:39 -06:00			`show -prefix select -format dot -notitle \`
presentation progress 2014-02-06 07:01:43 -06:00			`-color red @cone_ab -color magenta @cone_a \`
			`-color blue @cone_b`