mirror of https://github.com/YosysHQ/yosys.git
17 lines
438 B
Coq
17 lines
438 B
Coq
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module Reduction (A1, A2, A3, A4, A5, A6, Y1, Y2, Y3, Y4, Y5, Y6);
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input [1:0] A1;
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input [1:0] A2;
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input [1:0] A3;
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input [1:0] A4;
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input [1:0] A5;
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input [1:0] A6;
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output Y1, Y2, Y3, Y4, Y5, Y6;
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//reg Y1, Y2, Y3, Y4, Y5, Y6;
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assign Y1=&A1; //reduction AND
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assign Y2=|A2; //reduction OR
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assign Y3=~&A3; //reduction NAND
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assign Y4=~|A4; //reduction NOR
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assign Y5=^A5; //reduction XOR
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assign Y6=~^A6; //reduction XNOR
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endmodule
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