yosys/tests/verilog/parameters_across_files.ys

read_verilog -sv <<EOF
parameter Q = 1;
EOF
read_verilog -sv <<EOF
parameter P = Q;
module top(
    output integer out
);
    assign out = P;
    always @*
        assert (out == 1);
endmodule
EOF

hierarchy
proc
flatten
opt -full
async2sync
select -module top
sat -verify -seq 1 -tempinduct -prove-asserts -show-all
sv: allow globals in one file to depend on globals in another This defers the simplification of globals so that globals in one file may depend on globals in other files. Adds a simplify() call downstream because globals are appended at the end. 2021-03-11 12:05:04 -06:00			`read_verilog -sv <<EOF`
			`parameter Q = 1;`
			`EOF`
			`read_verilog -sv <<EOF`
			`parameter P = Q;`
			`module top(`
			`output integer out`
			`);`
			`assign out = P;`
			`always @*`
			`assert (out == 1);`
			`endmodule`
			`EOF`

			`hierarchy`
			`proc`
			`flatten`
			`opt -full`
tests: Run async2sync before sat and/or sim to handle $check cells Right now neither `sat` nor `sim` have support for the `$check` cell. For formal verification it is a good idea to always run either async2sync or clk2fflogic which will (in a future commit) lower `$check` to `$assert`, etc. While `sim` should eventually support `$check` directly, using `async2sync` is ok for the current tests that use `sim`, so this commit also runs `async2sync` before running sim on designs containing assertions. 2024-01-22 10:44:05 -06:00			`async2sync`
sv: allow globals in one file to depend on globals in another This defers the simplification of globals so that globals in one file may depend on globals in other files. Adds a simplify() call downstream because globals are appended at the end. 2021-03-11 12:05:04 -06:00			`select -module top`
			`sat -verify -seq 1 -tempinduct -prove-asserts -show-all`