yosys/docs/resources/PRESENTATION_ExAdv/red_or3x1_test.ys

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2014-02-16 06:45:47 -06:00
read_verilog red_or3x1_test.v
hierarchy -check -top test
techmap -map red_or3x1_map.v;;
splitnets -ports
show -prefix red_or3x1 -format pdf -notitle -lib red_or3x1_cells.v