mirror of https://github.com/YosysHQ/yosys.git
6 lines
158 B
Plaintext
6 lines
158 B
Plaintext
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#!/bin/bash
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iverilog -D POST_IMPL -o verif_post -s tb_top tb_top.v top.vqm $(yosys-config --datdir/altera_intel/max10/cells_comb_max10.v)
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vvp -N verif_post
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