mirror of https://github.com/YosysHQ/yosys.git
26 lines
568 B
Plaintext
26 lines
568 B
Plaintext
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# ECP5-5G LUT library for ABC
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# Note that ECP5 architecture assigns difference
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# in LUT input delay to interconnect, so this is
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# considered too
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# Simple LUTs
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# area D C B A
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1 1 141
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2 1 141 275
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3 1 141 275 379
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4 1 141 275 379 379
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# LUT5 = 2x LUT4 + PFUMX
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# area M0 D C B A
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5 2 151 239 373 477 477
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# LUT6 = 2x LUT5 + MUX2
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# area M1 M0 D C B A
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6 4 148 292 380 514 618 618
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# LUT7 = 2x LUT6 + MUX2
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# area M2 M1 M0 D C B A
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7 8 148 289 433 521 655 759 759
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