mirror of https://github.com/YosysHQ/yosys.git
46 lines
1.4 KiB
Bash
46 lines
1.4 KiB
Bash
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#!/bin/bash
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make -C ../..
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set -x
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vg=""
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# vg="valgrind --leak-check=full --show-reachable=yes --log-file=valgrind.log"
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cd aes_core
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time $vg ../../../yosys -qt -l synth.log -o synth.v -s ../run-synth.ys \
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aes_cipher_top.v aes_inv_cipher_top.v aes_inv_sbox.v \
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aes_key_expand_128.v aes_rcon.v aes_sbox.v
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cd ../fpu
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time $vg ../../../yosys -qt -l synth.log -o synth.v -f "verilog -nolatches" -s ../run-synth.ys \
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fpu.v except.v post_norm.v pre_norm_fmul.v pre_norm.v primitives.v
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cd ../i2c
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time $vg ../../../yosys -qt -l synth.log -o synth.v -s ../run-synth.ys \
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i2c_master_top.v i2c_master_bit_ctrl.v i2c_master_byte_ctrl.v
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cd ../sasc
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time $vg ../../../yosys -qt -l synth.log -o synth.v -s ../run-synth.ys \
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sasc_top.v sasc_brg.v sasc_fifo4.v
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cd ../simple_spi
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time $vg ../../../yosys -qt -l synth.log -o synth.v -s ../run-synth.ys \
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simple_spi_top.v fifo4.v
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cd ../spi
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time $vg ../../../yosys -qt -l synth.log -o synth.v -s ../run-synth.ys \
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spi_top.v spi_clgen.v spi_shift.v
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cd ../ss_pcm
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time $vg ../../../yosys -qt -l synth.log -o synth.v -s ../run-synth.ys \
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pcm_slv_top.v
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cd ../systemcaes
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time $vg ../../../yosys -qt -l synth.log -o synth.v -s ../run-synth.ys \
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aes.v byte_mixcolum.v keysched.v mixcolum.v sbox.v subbytes.v word_mixcolum.v
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cd ../usb_phy
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time $vg ../../../yosys -qt -l synth.log -o synth.v -s ../run-synth.ys \
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usb_phy.v usb_rx_phy.v usb_tx_phy.v
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