2024-01-12 22:46:04 -06:00
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yosys> stat
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2. Printing statistics.
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=== fifo ===
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Number of wires: 28
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Number of wire bits: 219
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Number of public wires: 9
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Number of public wire bits: 45
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Number of memories: 1
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Number of memory bits: 2048
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Number of processes: 3
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Number of cells: 9
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$add 1
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$logic_and 2
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$logic_not 2
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$memrd 1
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$sub 1
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addr_gen 2
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=== addr_gen ===
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Number of wires: 8
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Number of wire bits: 60
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Number of public wires: 4
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Number of public wire bits: 11
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Number of memories: 0
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Number of memory bits: 0
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Number of processes: 2
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Number of cells: 2
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$add 1
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$eq 1
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yosys> stat -top fifo
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2024-01-29 18:34:29 -06:00
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17. Printing statistics.
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2024-01-12 22:46:04 -06:00
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=== fifo ===
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2024-03-17 16:02:40 -05:00
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Number of wires: 94
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Number of wire bits: 260
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Number of public wires: 94
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Number of public wire bits: 260
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2024-01-12 22:46:04 -06:00
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Number of memories: 0
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Number of memory bits: 0
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Number of processes: 0
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Number of cells: 138
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2024-03-17 16:02:40 -05:00
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$scopeinfo 2
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2024-01-12 22:46:04 -06:00
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SB_CARRY 26
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SB_DFF 26
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SB_DFFER 25
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2024-03-17 16:02:40 -05:00
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SB_LUT4 58
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2024-01-12 22:46:04 -06:00
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SB_RAM40_4K 1
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