mirror of https://github.com/YosysHQ/yosys.git
7 lines
228 B
Plaintext
7 lines
228 B
Plaintext
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read_verilog ../common/blockram.v
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chparam -set ADDRESS_WIDTH 10 -set DATA_WIDTH 10 sync_ram_sdp
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synth_intel_alm -family cyclonev
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cd sync_ram_sdp
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select -assert-count 1 t:MISTRAL_M10K
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select -assert-none t:MISTRAL_M10K %% t:* %D
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