yosys/tests/hana/test_intermout_always_ff_3_...

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2013-01-05 04:13:26 -06:00
module NonBlockingEx(clk, merge, er, xmit, fddi, claim);
input clk, merge, er, xmit, fddi;
output reg claim;
reg fcr;
always @(posedge clk)
begin
fcr = er | xmit;
if(merge)
claim = fcr & fddi;
else
claim = fddi;
end
endmodule