riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
yosys/techlibs/xilinx/tests/.gitignore

7 lines
64 B
Plaintext
Raw Normal View History

Towards Xilinx bram support
2015-01-05 06:59:04 -06:00
bram1_cmp
bram1.mk
bram1_[0-9]*/
Added Xilinx test case for initialized brams
2015-04-06 06:03:37 -05:00
bram2.log
bram2_syn.v
bram2_tb