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21 lines
522 B
Systemverilog
21 lines
522 B
Systemverilog
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// This test checks that we correctly elaborate interfaces in modules, even if they are loaded on
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// demand. The "ondemand" module is defined in ondemand.sv in this directory and will be read as
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// part of the hierarchy pass.
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interface iface;
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logic [7:0] x;
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logic [7:0] y;
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endinterface
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module dut (input logic [7:0] x, output logic [7:0] y);
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iface intf();
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assign intf.x = x;
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assign y = intf.y;
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ondemand u(.intf);
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endmodule
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module ref (input logic [7:0] x, output logic [7:0] y);
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assign y = ~x;
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endmodule
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