This website requires JavaScript.
Explore
Help
Sign In
riscv
/
yosys
mirror of
https://github.com/YosysHQ/yosys.git
Watch
1
Star
0
Fork
You've already forked yosys
0
Code
Issues
Projects
Releases
Wiki
Activity
6e38848b92
yosys
/
tests
/
opt
/
opt_lut_port.ys
4 lines
65 B
Plaintext
Raw
Normal View
History
Unescape
Escape
opt_lut: leave intact LUTs with cascade feeding module outputs.
2018-12-07 11:13:52 -06:00
read_ilang opt_lut_port.il
opt_lut: eliminate LUTs evaluating to constants or inputs.
2018-12-31 17:53:23 -06:00
opt_lut
opt_lut: leave intact LUTs with cascade feeding module outputs.
2018-12-07 11:13:52 -06:00
select -assert-count 2 t:$lut