2016-03-05 01:34:05 -06:00
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#!/bin/bash
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2016-03-11 04:30:01 -06:00
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set -ex
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2016-03-05 01:34:05 -06:00
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# iverlog simulation
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echo "Doing Verilog simulation with iverilog"
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2017-04-08 22:54:31 -05:00
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iverilog -o counter_tb counter.v counter_tb.v
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2016-03-11 04:30:01 -06:00
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./counter_tb; gtkwave counter_tb.gtkw &
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2016-03-05 01:34:05 -06:00
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# yosys synthesis
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../../yosys counter_digital.ys
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# requires ngspice with xspice support enabled:
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ngspice testbench_digital.sp
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2016-03-11 04:30:01 -06:00
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