yosys/tests/asicworld/code_hdl_models_encoder_4to...

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2013-01-05 04:13:26 -06:00
module encoder_4to2_gates (i0,i1,i2,i3,y);
input i0,i1,i2,i3;
output [1:0] y;
or o1 (y[0],i1,i3);
or o2 (y[1],i2,i3);
endmodule