yosys/tests/ice40/add_sub_top.v

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Coq
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2019-08-19 23:50:05 -05:00
module top
(
input [3:0] x,
input [3:0] y,
output [3:0] A,
output [3:0] B
);
assign A = x + y;
assign B = x - y;
endmodule