2013-01-05 04:13:26 -06:00
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#!/bin/bash
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set -e
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make -C ../..
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../../yosys -l i2c_master_syn.log -o i2c_master_syn.v \
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-p hierarchy -p proc -p memory -p techmap -p opt -p abc -p opt \
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i2c_master_top.v i2c_master_bit_ctrl.v i2c_master_byte_ctrl.v
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. /opt/Xilinx/13.4/ISE_DS/settings64.sh
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vlogcomp --work ref i2c_master_bit_ctrl.v
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vlogcomp --work ref i2c_master_byte_ctrl.v
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vlogcomp --work ref i2c_master_top.v
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vlogcomp --work ref i2c_slave_model.v
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vlogcomp --work ref spi_slave_model.v
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vlogcomp --work ref tst_bench_top.v
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vlogcomp --work ref wb_master_model.v
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fuse --work ref -o testbench_ref --top tst_bench_top
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cat > testbench_ref.tcl << EOT
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vcd dumpfile testbench_ref.vcd
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vcd dumpvars -m tst_bench_top -l 0
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vcd dumpon
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run 2 ms
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exit
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EOT
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./testbench_ref -tclbatch testbench_ref.tcl
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vlogcomp --work syn i2c_master_syn.v
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2013-09-15 04:52:57 -05:00
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vlogcomp --work syn ../../techlibs/common/simlib.v
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2013-11-24 13:44:00 -06:00
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vlogcomp --work syn ../../techlibs/common/simcells.v
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2013-01-05 04:13:26 -06:00
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vlogcomp --work syn i2c_slave_model.v
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vlogcomp --work syn spi_slave_model.v
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vlogcomp --work syn tst_bench_top.v
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vlogcomp --work syn wb_master_model.v
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fuse --work syn -o testbench_syn --top tst_bench_top
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cat > testbench_syn.tcl << EOT
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vcd dumpfile testbench_syn.vcd
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vcd dumpvars -m tst_bench_top -l 0
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vcd dumpon
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run 2 ms
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exit
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EOT
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./testbench_syn -tclbatch testbench_syn.tcl
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perl ../tools/vcdcd.pl testbench_ref.vcd testbench_syn.vcd | tee testbench_diff.txt
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echo READY.
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