mirror of https://github.com/YosysHQ/yosys.git
104 lines
3.2 KiB
Plaintext
104 lines
3.2 KiB
Plaintext
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read_verilog -icells <<EOT
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module adff0(input C, R, D, output [2:0] Q);
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$_DFF_PP0_ ff0 (.C(C), .R(R), .D(D), .Q(Q[0]));
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$_DFF_PN0_ ff1 (.C(C), .R(R), .D(D), .Q(Q[1]));
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$_DFF_NP0_ ff2 (.C(C), .R(R), .D(D), .Q(Q[2]));
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endmodule
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module adff1(input C, R, D, output [2:0] Q);
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$_DFF_PP1_ ff0 (.C(C), .R(R), .D(D), .Q(Q[0]));
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$_DFF_PN1_ ff1 (.C(C), .R(R), .D(D), .Q(Q[1]));
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$_DFF_NP1_ ff2 (.C(C), .R(R), .D(D), .Q(Q[2]));
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endmodule
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module adffe0(input C, E, R, D, output [3:0] Q);
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$_DFFE_PP0P_ ff0 (.C(C), .R(R), .E(E), .D(D), .Q(Q[0]));
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$_DFFE_PP0N_ ff1 (.C(C), .R(R), .E(E), .D(D), .Q(Q[1]));
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$_DFFE_PN0P_ ff2 (.C(C), .R(R), .E(E), .D(D), .Q(Q[2]));
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$_DFFE_NP0P_ ff3 (.C(C), .R(R), .E(E), .D(D), .Q(Q[3]));
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endmodule
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module adffe1(input C, E, R, D, output [3:0] Q);
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$_DFFE_PP1P_ ff0 (.C(C), .R(R), .E(E), .D(D), .Q(Q[0]));
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$_DFFE_PP1N_ ff1 (.C(C), .R(R), .E(E), .D(D), .Q(Q[1]));
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$_DFFE_PN1P_ ff2 (.C(C), .R(R), .E(E), .D(D), .Q(Q[2]));
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$_DFFE_NP1P_ ff3 (.C(C), .R(R), .E(E), .D(D), .Q(Q[3]));
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endmodule
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module top(input C, E, R, D, output [13:0] Q);
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adff0 adff0_(.C(C), .R(R), .D(D), .Q(Q[2:0]));
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adff1 adff1_(.C(C), .R(R), .D(D), .Q(Q[5:3]));
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adffe0 adffe0_(.C(C), .R(R), .E(E), .D(D), .Q(Q[9:6]));
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adffe1 adffe1_(.C(C), .R(R), .E(E), .D(D), .Q(Q[13:10]));
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endmodule
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EOT
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design -save orig
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flatten
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equiv_opt -assert -multiclock -map +/simcells.v dfflegalize -cell $_DFF_PP0_ x
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equiv_opt -assert -multiclock -map +/simcells.v dfflegalize -cell $_DFFE_PP0P_ x
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#equiv_opt -assert -multiclock -map +/simcells.v dfflegalize -cell $_DFFSR_PPP_ x
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#equiv_opt -assert -multiclock -map +/simcells.v dfflegalize -cell $_DFFSRE_PPPP_ x
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# Convert everything to ADFFs.
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design -load orig
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dfflegalize -cell $_DFF_PP0_ x
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select -assert-count 2 adff0/t:$_NOT_
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select -assert-count 8 adff1/t:$_NOT_
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select -assert-count 2 adffe0/t:$_NOT_
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select -assert-count 10 adffe1/t:$_NOT_
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select -assert-count 0 adff0/t:$_MUX_
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select -assert-count 0 adff1/t:$_MUX_
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select -assert-count 4 adffe0/t:$_MUX_
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select -assert-count 4 adffe1/t:$_MUX_
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select -assert-count 14 t:$_DFF_PP0_
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select -assert-none t:$_DFF_PP0_ t:$_MUX_ t:$_NOT_ top/* %% %n t:* %i
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# Convert everything to ADFFEs.
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design -load orig
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dfflegalize -cell $_DFFE_PP0P_ x
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select -assert-count 2 adff0/t:$_NOT_
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select -assert-count 8 adff1/t:$_NOT_
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select -assert-count 3 adffe0/t:$_NOT_
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select -assert-count 11 adffe1/t:$_NOT_
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select -assert-count 14 t:$_DFFE_PP0P_
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select -assert-none t:$_DFFE_PP0P_ t:$_NOT_ top/* %% %n t:* %i
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# Convert everything to DFFSRs.
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design -load orig
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dfflegalize -cell $_DFFSR_PPP_ x
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select -assert-count 2 adff0/t:$_NOT_
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select -assert-count 2 adff1/t:$_NOT_
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select -assert-count 2 adffe0/t:$_NOT_
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select -assert-count 2 adffe1/t:$_NOT_
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select -assert-count 0 adff0/t:$_MUX_
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select -assert-count 0 adff1/t:$_MUX_
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select -assert-count 4 adffe0/t:$_MUX_
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select -assert-count 4 adffe1/t:$_MUX_
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select -assert-count 14 t:$_DFFSR_PPP_
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select -assert-none t:$_DFFSR_PPP_ t:$_MUX_ t:$_NOT_ top/* %% %n t:* %i
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# Convert everything to DFFSREs.
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design -load orig
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dfflegalize -cell $_DFFSRE_PPPP_ x
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select -assert-count 2 adff0/t:$_NOT_
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select -assert-count 2 adff1/t:$_NOT_
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select -assert-count 3 adffe0/t:$_NOT_
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select -assert-count 3 adffe1/t:$_NOT_
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select -assert-count 14 t:$_DFFSRE_PPPP_
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select -assert-none t:$_DFFSRE_PPPP_ t:$_NOT_ top/* %% %n t:* %i
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