This website requires JavaScript.
Explore
Help
Sign In
riscv
/
yosys
mirror of
https://github.com/YosysHQ/yosys.git
Watch
1
Star
0
Fork
You've already forked yosys
0
Code
Issues
Projects
Releases
Wiki
Activity
04f6158bf2
yosys
/
examples
/
intel
/
asicworld_lfsr
/
run_cycloneiv
3 lines
101 B
Plaintext
Raw
Normal View
History
Unescape
Escape
Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs
2017-04-05 23:01:29 -05:00
#!/bin/env bash
Fixed the -vout flag to -vqm in examples/intel directory
2017-11-14 22:55:48 -06:00
yosys -p "synth_intel -family cycloneiv -top lfsr_updown -vqm top.vqm" lfsr_updown.v