yosys/examples/cmos/counter.ys

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read_verilog counter.v
read_verilog -lib cmos_cells.v
synth
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dfflibmap -liberty cmos_cells.lib
abc -liberty cmos_cells.lib
opt_clean
stat -liberty cmos_cells.lib
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# http://vlsiarch.ecen.okstate.edu/flows/MOSIS_SCMOS/latest/cadence/lib/tsmc025/signalstorm/osu025_stdcells.lib
# dfflibmap -liberty osu025_stdcells.lib
# abc -liberty osu025_stdcells.lib;;
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write_verilog synth.v
write_spice synth.sp