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adding sky130_cds files

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rachanaerra 2023-02-16 16:13:08 -06:00
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You are advised that by using this repository at your own risk. By
using the PDK, you assume all liability for any resulting errors and
problems.
Oklahoma State University, 2022
James Stine
Rachana Erra

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incr_conn YES
results_db -drc mult_seq.drc_errors.ascii -ascii
/// Tolerance for round-off errors on skew edges
tolerance 0.001
/// Unused MaskLayers: (FOM DNM NWM HVTRM TUNM ONOM LVOM P1M NPCM LDNTM NSDM PSDM LICM1 LI1M CTM1 MM1 VIM MM2 VIM2 MM3 VIM3 MM4 VIM4 MM5 NSM PDM PBO RPM CU1M PMM2)
layer_def nwell 1000
layer_map 64 -datatype 20 1000 // nwell drawing
layer_def diff 1001
layer_map 65 -datatype 20 1001 // diff drawing
layer_def poly 1008
layer_map 66 -datatype 20 1008 // poly drawing
layer_def licon1 1012
layer_map 66 -datatype 44 1012 // licon1 drawing
layer_def li1 1013
layer_map 67 -datatype 20 1013 // li1 drawing
layer_def mcon 1014
layer_map 67 -datatype 44 1014 // mcon drawing
layer_def met1 1015
layer_map 68 -datatype 20 1015 // met1 drawing
layer_def via 1016
layer_map 68 -datatype 44 1016 // via drawing
layer_def met2 1017
layer_map 69 -datatype 20 1017 // met2 drawing
layer_def via2 1019
layer_map 69 -datatype 44 1019 // via2 drawing
layer_def met3 1020
layer_map 70 -datatype 20 1020 // met3 drawing
layer_def via3 1021
layer_map 70 -datatype 44 1021 // via3 drawing
layer_def met4 1022
layer_map 71 -datatype 20 1022 // met4 drawing
layer_def via4 1023
layer_map 71 -datatype 44 1023 // via4 drawing
layer_def met5 1024
layer_map 72 -datatype 20 1024 // met5 drawing
layer_def pad 1026
layer_map 76 -datatype 20 1026 // pad drawing
layer_def capacitor 1031
layer_map 82 -datatype 64 1031 // capacitor drawing
layer_def inductor 1034
layer_map 82 -datatype 24 1034 // inductor drawing
layer_def polyGate 1074
layer_map 66 -datatype 9 1074 // poly gate
layer_def padText 1089
layer_map 76 -texttype 5 1089 // pad label
layer_def diffLabel 1090
layer_map 65 -datatype 6 1090 // diff label
layer_def nwellLabel 1092
layer_map 64 -datatype 5 1092 // nwell label
layer_def polyLabel 1093
layer_map 66 -datatype 5 1093 // poly label
layer_def met1Label 1094
layer_map 68 -datatype 5 1094 // met1 label
layer_def met2Label 1095
layer_map 69 -datatype 5 1095 // met2 label
layer_def met3Label 1096
layer_map 70 -datatype 5 1096 // met3 label
layer_def met4Label 1097
layer_map 71 -datatype 5 1097 // met4 label
layer_def met5Label 1098
layer_map 72 -datatype 5 1098 // met5 label
layer_def li1Block 1099
layer_map 67 -datatype 10 1099 // li1 blockage
layer_def met1Block 1100
layer_map 68 -datatype 10 1100 // met1 blockage
layer_def met2Block 1101
layer_map 69 -datatype 10 1101 // met2 blockage
layer_def met3Block 1102
layer_map 70 -datatype 10 1102 // met3 blockage
layer_def met4Block 1103
layer_map 71 -datatype 10 1103 // met4 blockage
layer_def met5Block 1104
layer_map 72 -datatype 10 1104 // met5 blockage
layer_def diffBndry 1106
layer_map 65 -datatype 4 1106 // diff boundary
layer_def mconBndry 1108
layer_map 67 -datatype 60 1108 // mcon boundary
layer_def polyBndry 1109
layer_map 66 -datatype 4 1109 // poly boundary
layer_def viaBndry 1110
layer_map 68 -datatype 60 1110 // via boundary
layer_def via2Bndry 1111
layer_map 69 -datatype 60 1111 // via2 boundary
layer_def via3Bndry 1112
layer_map 70 -datatype 60 1112 // via3 boundary
layer_def via4Bndry 1113
layer_map 71 -datatype 60 1113 // via4 boundary
layer_def li1tt 1114 1115 1116 1117
layer_map 67 -texttype 20 1114 // li1 drawing
layer_map 67 -texttype 5 1115 // li1 label
layer_map 67 -texttype 23 1116 // li1 net
layer_map 67 -texttype 16 1117 // li1 pin
layer_def met1tt 1118 1119 1120 1121
layer_map 68 -texttype 20 1118 // met1 drawing
layer_map 68 -texttype 5 1119 // met1 label
layer_map 68 -texttype 23 1120 // met1 net
layer_map 68 -texttype 16 1121 // met1 pin
layer_def met2tt 1122 1123 1124 1125
layer_map 69 -texttype 20 1122 // met2 drawing
layer_map 69 -texttype 5 1123 // met2 label
layer_map 69 -texttype 23 1124 // met2 net
layer_map 69 -texttype 16 1125 // met2 pin
layer_def met3tt 1126 1127 1128 1129
layer_map 70 -texttype 20 1126 // met3 drawing
layer_map 70 -texttype 5 1127 // met3 label
layer_map 70 -texttype 23 1128 // met3 net
layer_map 70 -texttype 16 1129 // met3 pin
layer_def met4tt 1130 1131 1132 1133
layer_map 71 -texttype 20 1130 // met4 drawing
layer_map 71 -texttype 5 1131 // met4 label
layer_map 71 -texttype 23 1132 // met4 net
layer_map 71 -texttype 16 1133 // met4 pin
layer_def met5tt 1134 1135 1136 1137
layer_map 72 -texttype 20 1134 // met5 drawing
layer_map 72 -texttype 5 1135 // met5 label
layer_map 72 -texttype 23 1136 // met5 net
layer_map 72 -texttype 16 1137 // met5 pin
layer_def polytt 1138 1139 1140 1141
layer_map 66 -texttype 20 1138 // poly drawing
layer_map 66 -texttype 5 1139 // poly label
layer_map 66 -texttype 23 1140 // poly net
layer_map 66 -texttype 16 1141 // poly pin
layer_def difftt 1142 1143 1144 1145
layer_map 65 -texttype 20 1142 // diff drawing
layer_map 65 -texttype 6 1143 // diff label
layer_map 65 -texttype 23 1144 // diff net
layer_map 65 -texttype 16 1145 // diff pin
layer_def poly_pin 1146
layer_map 66 -datatype 16 1146 // poly pin
layer_def li1_pin 1147
layer_map 67 -datatype 16 1147 // li1 pin
layer_def met1_pin 1148
layer_map 68 -datatype 16 1148 // met1 pin
layer_def met2_pin 1149
layer_map 69 -datatype 16 1149 // met2 pin
layer_def met3_pin 1150
layer_map 70 -datatype 16 1150 // met3 pin
layer_def met4_pin 1151
layer_map 71 -datatype 16 1151 // met4 pin
layer_def met5_pin 1152
layer_map 72 -datatype 16 1152 // met5 pin
layer_def nwellpt 1153
layer_map 64 -texttype 16 1153 // nwell pin
layer_map 64 -texttype 0 1153 // nwell pin
layer_def polypt 1154
layer_map 66 -texttype 16 1154 // poly pin
layer_map 66 -texttype 0 1154 // poly pin
layer_def li1pt 1155
layer_map 67 -texttype 16 1155 // li1 pin
layer_map 67 -texttype 0 1155 // li1 pin
layer_def met1pt 1156
layer_map 68 -texttype 16 1156 // met1 pin
layer_map 68 -texttype 0 1156 // met1 pin
layer_def met2pt 1157
layer_map 69 -texttype 16 1157 // met2 pin
layer_map 69 -texttype 0 1157 // met2 pin
layer_def met3pt 1158
layer_map 70 -texttype 16 1158 // met3 pin
layer_map 70 -texttype 0 1158 // met3 pin
layer_def met4pt 1159
layer_map 71 -texttype 16 1159 // met4 pin
layer_map 71 -texttype 0 1159 // met4 pin
layer_def met5pt 1160
layer_map 72 -texttype 16 1160 // met5 pin
layer_map 72 -texttype 0 1160 // met5 pin
layer_def padtt 1167 1089
layer_map 76 -texttype 20 1167 // pad drawing
// 1089 -> pad label
layer_def pad_pin 1168
layer_map 76 -datatype 16 1168 // pad pin
layer_def padpt 1169
layer_map 76 -texttype 16 1169 // pad pin
layer_map 76 -texttype 0 1169 // pad pin
layer_def met5Pin 1152
// 1152 -> met5 pin
layer_def met4Pin 1151
// 1151 -> met4 pin
layer_def met3Pin 1150
// 1150 -> met3 pin
layer_def met2Pin 1149
// 1149 -> met2 pin
layer_def met1Pin 1148
// 1148 -> met1 pin
layer_def li1Pin 1147
// 1147 -> li1 pin
layer_def polyPin 1146
// 1146 -> poly pin
layer_def diffPin 1222
layer_map 65 -datatype 16 1222 // diff pin
treat_non_baselayer_as_toplayer yes
base_layer diff
base_layer poly
layer_def pwellLabel 1229
layer_map 64 -datatype 59 1229 // pwell label
layer_def pwelltt 1230
layer_map 64 -texttype 59 1230 // pwell label
layer_def pwell_pin 1231
layer_map 122 -datatype 16 1231 // pwell pin
layer_def pwellpt 1232
layer_map 122 -texttype 16 1232 // pwell pin
layer_map 122 -texttype 0 1232 // pwell pin
copy inductor -outputlayer inductor_exempt
and diff nwell -outputlayer PDIFF
not diff nwell -outputlayer NDIFF
not diff poly -outputlayer SRCDRN
and poly diff -outputlayer POLYandDIFF
copy POLYandDIFF -outputlayer GATE
edge_boolean -inside GATE diff -outputlayer GATESIDE
edge_boolean -coincident_only -inside GATE diff -outputlayer GATEEND
//edge_boolean -coincident_only -outside diff tap -outputlayer diffTapEdge
copy GATE -outputlayer MOSGATE
copy MOSGATE -outputlayer EMOSGATE
disconnect
//and npc licon1 -outputlayer npccon
//connect dnwell nwell
//connect nwell tap -by NTAP
//connect tap li1 -by licon1
//connect poly li1 -by npccon
connect li1 met1 -by mcon
connect met1 met2 -by via
connect met3 met2 -by via2
connect met3 met4 -by via3
connect met4 met5 -by via4
connect met5 pad
rule "R0_nwell_X1" {
caption "nwell_X1: off 0.005 grid nwell vertex"
offgrid nwell 5
}
rule "R1_diff_X1" {
caption "diff_X1: off 0.005 grid diff vertex"
offgrid diff 5
}
rule "R2_poly_X1" {
caption "poly_X1: off 0.005 grid poly vertex"
offgrid poly 5
}
rule "R3_li1_X1" {
caption "li1_X1: off 0.005 grid li1 vertex"
offgrid li1 5
}
rule "R4_mcon_X1" {
caption "mcon_X1: off 0.005 grid mcon vertex"
offgrid mcon 5
}
rule "R5_met1_X1" {
caption "met1_X1: off 0.005 grid met1 vertex"
offgrid met1 5
}
rule "R6_via_X1" {
caption "via_X1: off 0.005 grid via vertex"
offgrid via 5
}
rule "R7_met2_X1" {
caption "met2_X1: off 0.005 grid met2 vertex"
offgrid met2 5
}
rule "R8_via2_X1" {
caption "via2_X1: off 0.005 grid via2 vertex"
offgrid via2 5
}
rule "R9_met3_X1" {
caption "met3_X1: off 0.005 grid met3 vertex"
offgrid met3 5
}
rule "R10_via3_X1" {
caption "via3_X1: off 0.005 grid via3 vertex"
offgrid via3 5
}
rule "R11_met4_X1" {
caption "met4_X1: off 0.005 grid met4 vertex"
offgrid met4 5
}
rule "R12_via4_X1" {
caption "via4_X1: off 0.005 grid via4 vertex"
offgrid via4 5
}
rule "R13_met5_X1" {
caption "met5_X1: off 0.005 grid met5 vertex"
offgrid met5 5
}
rule "R14_pad_X1" {
caption "pad_X1: off 0.005 grid pad vertex"
offgrid pad 5
}
rule "R15_cap_X1" {
caption "cap_X1: off 0.005 grid capacitor vertex"
offgrid capacitor 5
}
rule "R16_ind_X1" {
caption "ind_X1: off 0.005 grid inductor vertex"
offgrid inductor 5
}
rule "R17_nwell_X2" {
caption "nwell_X2: non-octagonal nwell edge"
angle nwell -ltgt 0 45
angle nwell -ltgt 45 90
}
rule "R18_diff_X2" {
caption "diff_X2: non-octagonal diff edge"
angle diff -ltgt 0 45
angle diff -ltgt 45 90
}
rule "R19_met1_X2" {
caption "met1_X2: non-octagonal met1 edge"
angle met1 -ltgt 0 45
angle met1 -ltgt 45 90
}
rule "R20_met2_X2" {
caption "met2_X2: non-octagonal met2 edge"
angle met2 -ltgt 0 45
angle met2 -ltgt 45 90
}
rule "R21_met3_X2" {
caption "met3_X2: non-octagonal met3 edge"
angle met3 -ltgt 0 45
angle met3 -ltgt 45 90
}
rule "R22_met4_X2" {
caption "met4_X2: non-octagonal met4 edge"
angle met4 -ltgt 0 45
angle met4 -ltgt 45 90
}
rule "R23_met5_X2" {
caption "met5_X2: non-octagonal met5 edge"
angle met5 -ltgt 0 45
angle met5 -ltgt 45 90
}
rule "R24_cap_X2" {
caption "cap_X2: non-octagonal capacitor edge"
angle capacitor -ltgt 0 45
angle capacitor -ltgt 45 90
}
rule "R25_ind_X2" {
caption "ind_X2: non-octagonal inductor edge"
angle inductor -ltgt 0 45
angle inductor -ltgt 45 90
}

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#
process sky130 {
background_dielectric_constant 1.0
temp_reference 30
}
# Well declarations
well NWELL {}
well PWELL {}
# Diffusion Layers
diffusion P_SOURCE_DRAIN {
thickness 0.12
resistivity 15
}
diffusion N_SOURCE_DRAIN {
thickness 0.12
resistivity 15
}
# Conducting Layers
conductor Poly {
min_spacing 0.21
min_width 0.15
height 0.3262
thickness 0.180
resistivity 48.2
temp_tc1 0.0008916
temp_tc2 8.443e-07
gate_forming_layer true
wire_edge_enlargement_r {
wee_widths 0.15
wee_spacings 0.21
wee_adjustments -0.0280
}
wire_edge_enlargement_c {
wee_widths 0.15
wee_spacings 0.21
wee_adjustments 0.0
}
}
conductor li1 {
min_spacing 0.17
min_width 0.17
height 0.9361
thickness 0.100
resistivity 12.8
temp_tc1 0.0006045
temp_tc2 -3.693e-07
gate_forming_layer false
wire_edge_enlargement_r {
wee_widths 0.17
wee_spacings 0.17
wee_adjustments 0.0085
}
wire_edge_enlargement_c {
wee_widths 0.17
wee_spacings 0.17
wee_adjustments 0
}
}
conductor met1 {
min_spacing 0.14
min_width 0.14
height 1.3761
thickness 0.36
resistivity 0.125
temp_tc1 0.003179
temp_tc2 3.094e-07
gate_forming_layer false
wire_edge_enlargement_r {
wee_widths 0.14
wee_spacings 0.14
wee_adjustments -0.0195
}
wire_edge_enlargement_c {
wee_widths 0.14
wee_spacings 0.14
wee_adjustments 0
}
}
conductor met2 {
min_spacing 0.14
min_width 0.14
height 2.0061
thickness 0.360
resistivity 0.125
temp_tc1 0.003161
temp_tc2 -7.272e-07
gate_forming_layer false
wire_edge_enlargement_r {
wee_widths 0.14
wee_spacings 0.14
wee_adjustments -0.0195
}
wire_edge_enlargement_c {
wee_widths 0.14
wee_spacings 0.14
wee_adjustments 0
}
}
conductor met3 {
min_spacing 0.30
min_width 0.30
height 2.7861
thickness 0.845
resistivity 0.047
temp_tc1 0.003424
temp_tc2 -7.739e-07
gate_forming_layer false
wire_edge_enlargement_r {
wee_widths 0.30
wee_spacings 0.30
wee_adjustments -0.0125
}
wire_edge_enlargement_c {
wee_widths 0.30
wee_spacings 0.30
wee_adjustments 0
}
}
conductor met4 {
min_spacing 0.30
min_width 0.30
height 4.0211
thickness 0.845
resistivity 0.047
temp_tc1 0.003424
temp_tc2 -7.739e-07
gate_forming_layer false
wire_edge_enlargement_r {
wee_widths 0.30
wee_spacings 0.30
wee_adjustments -0.0125
}
wire_edge_enlargement_c {
wee_widths 0.30
wee_spacings 0.30
wee_adjustments 0
}
}
conductor met5 {
min_spacing 1.60
min_width 0.80
height 5.3711
thickness 1.260
resistivity 0.0285
temp_tc1 3.5e-3
temp_tc2 -7.5e-07
gate_forming_layer false
wire_edge_enlargement_r {
wee_widths 0.80
wee_spacings 1.60
wee_adjustments -0.0450
}
wire_edge_enlargement_c {
wee_widths 0.80
wee_spacings 1.60
wee_adjustments 0
}
}
# dielectric Layers
dielectric FOX {
conformal FALSE
height 0.0000
thickness 0.3262
dielectric_constant 3.9
}
dielectric IOX {
conformal TRUE
expandedFrom Poly
height 0.3262
thickness 0.0000
topThickness 0.0000
sideExpand 0.0060
dielectric_constant 3.9
}
dielectric SPNIT {
conformal TRUE
expandedFrom IOX
height 0.3262
thickness 0.0000
topThickness 0.1210
sideExpand 0.0431
dielectric_constant 7.5
}
dielectric PSG {
conformal FALSE
height 0.3262
thickness 0.6099
dielectric_constant 3.9
}
dielectric LINT {
conformal TRUE
expandedFrom li1
height 0.9361
thickness 0.0750
topThickness 0.0750
sideExpand 0.0610
dielectric_constant 7.3
}
dielectric NILD2 {
conformal FALSE
height 1.0111
thickness 0.3650
dielectric_constant 4.05
}
dielectric NILD3_C {
conformal TRUE
expandedFrom met1
height 1.3761
thickness 0.0000
topThickness 0.0000
sideExpand 0.0300
dielectric_constant 3.5
}
dielectric NILD3 {
conformal FALSE
height 1.3761
thickness 0.6300
dielectric_constant 4.5
}
dielectric NILD4_C {
conformal TRUE
expandedFrom met2
height 2.0061
thickness 0.0000
topThickness 0.0000
sideExpand 0.0300
dielectric_constant 3.5
}
dielectric NILD4 {
conformal FALSE
height 2.0061
thickness 0.7800
dielectric_constant 4.2
}
dielectric NILD5 {
conformal FALSE
height 2.7861
thickness 1.2350
dielectric_constant 4.1
}
dielectric NILD6 {
conformal FALSE
height 4.0211
thickness 1.3500
dielectric_constant 4.0
}
dielectric TOPOX {
conformal TRUE
expandedFrom met5
height 5.3711
thickness 0.0000
topThickness 0.0900
sideExpand 0.0700
dielectric_constant 3.9
}
dielectric TOPNIT {
conformal TRUE
expandedFrom TOPOX
height 5.3711
thickness 0.3777
topThickness 0.5400
sideExpand 0.4223
dielectric_constant 7.50
}
dielectric PI1 {
conformal FALSE
height 5.7488
thickness 6.1346
dielectric_constant 2.94
}
dielectric PI2 {
conformal FALSE
height 11.8834
thickness 7.5000
dielectric_constant 2.85
}
dielectric MOLD {
conformal FALSE
height 19.3834
thickness 40.0000
dielectric_constant 3.6
}
# Connect Layers
via CONT {
bottom_layer P_SOURCE_DRAIN
top_layer li1
contact_resistance 15
}
via CONT {
bottom_layer N_SOURCE_DRAIN
top_layer li1
contact_resistance 15
}
via via4 {
bottom_layer met4
top_layer met5
contact_resistance 0.38
temp_tc1 0.00177
temp_tc2 -1.6e-07
}
via via3 {
bottom_layer met3
top_layer met4
contact_resistance 3.41
temp_tc1 0.002366
temp_tc2 -1.025e-05
}
via via2 {
bottom_layer met2
top_layer met3
contact_resistance 3.41
temp_tc1 0.002366
temp_tc2 -1.025e-05
}
via via {
bottom_layer met1
top_layer met2
contact_resistance 4.5
temp_tc1 0.001081
temp_tc2 -1.903e-07
}
via mcon {
bottom_layer li1
top_layer met1
contact_resistance 9.3
temp_tc1 0.001067
temp_tc2 -5.324e-06
}
via licon {
bottom_layer Poly
top_layer li1
contact_resistance 152
temp_tc1 0.001249
temp_tc2 -6.647e-06
}

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# sky130_cds
<pre>
James E. Stine, Jr. and Rachana Erra
james.stine@okstate.edu
Oklahoma State University
School of Electrical and Computer Engineering
VLSI Computer Architecture Research Group
</pre>
Many thanks to Cadence Design Systems including David Junkin, Barry Nelson and Anton Kotz for all their amazing help and guidance.
Repository for SKY130 Process Design Kit and Cadence Design System tools.
**Submodules**</br>
This repository contains the Oklahoma State University standard cells for Skywater Technology 130nm (SKY130). They are integrated as submodules to get all of the standard-cells after cloning, type:
<pre>
git submodule update --init --recursive
</pre>
You can also get each submodule individually by typing:
<pre>
git submodule update --init sky130_osu_sc_t18
</pre>
If you wish to download them individually, you can do that at these links:
<pre>
https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t18/+/refs/heads/main
https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t15/+/refs/heads/main
https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12/+/refs/heads/main
</pre>
**Sample Designs:**<br/>
Right now there are two sample designs in the repository. One is a purely combinational design (mult.sv) and the other is a combination of combinational and sequential (mult_seq.sv). Right now, the mult_seq design is set up but can be easily modified and changed, if needed.
**Instructions to run synthesis and pnr:**
1. git clone git@github.com:stineje/sky130_cds.git
2. **Set up PDK:**<br/>
a. cd sky130_cds<br/>
b. git submodule update --init --recursive<br/>
3. **Run synthesis:**<br/>
a.cd synth<br/>
b.Add HDL to hdl subdirectory<br/>
c.Edit genus script.tcl to load in correct SV files<br/>
d.Also modify genus_script.tcl to add the timing needed any loading or input/output delays. There are also options for loading that can be changed. Right now, a FF is assumed to be at the beginning and end of the timing to constrain the timing properly.Constraint settings are found within the constraints top.sdc file.<br/>
e.make synth<br/>
f.All output is logged to synth.out that should be checked on completion. Reports are found within the reports directory and any mapped HDL is found in the top directory.<br/>
4. **Place-and-Route:**<br/>
a. Edit setup.tcl and change the design, netlist, and sdc location. These can be found by searching for mult seq in a text editor. These items should match the files done through synthesis.<br/>
b.innovus_config.tcl has plugins that allow commands to be run when needed. Right now, some plugins are enabled and some are not. This file would have be edited if one would want to do an additional command. These commands can be done before or after a step -- e.g.,pre init or post init.<br/>
c.To start the process, a Makefile is used. Type the following in this order: init, place, cts, postcts hold, route, postroute, signoff. For example, you could type, make init to run through a design for the init phase. If one would want to just run through route, just type make route and the scripts should run through all the scripts until the end of route provided the other steps have not been initiated.This, of course, is provided there are no errors.<br/>
d.Any commands run through the pnr are in the LOG subdirectory. There is one file that lists the commands (i.e., cmd) and the other that lists output from the command or the log files (i.e., .log). Reports are found in the RPT subdirectory.<br/>
e.To pull up a placed-and-routed design from the route stage , start innovus and type: restoreDesign DBS/route.enc.dat/ mult_seq. It is important that the last argument be the top-level design indicated during the synthesis stage.<br/>
Notes: There is more information in the PowerPoint slides found in the doc subdirectory.
**Generating a qrcTechfile for PEX using Quantus:**<br/>
qrcTechfile is a technology file specific to a PDK that is generated from an ict file. An ict file contains information about conductors, dielectrics, diffusion, substrate, via and so forth. It is created using the specified syntax for each of the commands.<br/>
<PRE>techgen -si sky130.ict</PRE>

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sky130_cds/VirtuosoOA/.cadence/dfII/Navigator/Options.xml Executable file
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("sample:/\tsample test_sky130 layout" (("open" (nil hierarchy "/{test_sky130 sample layout }:a"))) (((-7.479 4.421) (-2.906 8.604)) "a" "Layout" 2))("sky130_osu_sc_12T_hs__addf_1:/\tsky130_osu_sc_12T_hs__addf_1 sky130_osu_sc_t12 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t12 sky130_osu_sc_12T_hs__addf_1 layout }:a"))) (((-0.561 -2.269) (9.752 6.725)) "a" "Layout" 2))("sky130_osu_sc_12T_ls__dff_1:/\tsky130_osu_sc_12T_ls__dff_1 sky130_osu_sc_t12 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t12 sky130_osu_sc_12T_ls__dff_1 layout }:a"))) (((-0.7 -1.458) (8.866 5.919)) "a" "Layout" 2))("sky130_osu_sc_18T_hs__inv_1:/\tsky130_osu_sc_18T_hs__inv_1 sample schematic" (("open" (nil hierarchy "/{sample sky130_osu_sc_18T_hs__inv_1 schematic }:a"))) (((-1.89375 -0.74375) (0.20625 0.89375)) "a" "Schematics" 9))("sky130_osu_sc_18T_hs__inv_1:/\tsky130_osu_sc_18T_hs__inv_1 sample layout" (("open" (nil hierarchy "/{sample sky130_osu_sc_18T_hs__inv_1 layout }:a"))) (((-4.406 -1.511) (7.416 7.138)) "a" "Layout" 7))("sky130_osu_sc_18T_hs__addf_1:/\tsky130_osu_sc_18T_hs__addf_1 sky130_osu_sc_t18 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t18 sky130_osu_sc_18T_hs__addf_1 layout }:a"))) (((-0.501 1.07) (2.601 3.33)) "a" "Layout" 2))("sample:/\tsample example layout" (("open" (nil hierarchy "/{example sample layout }:a"))) (((-13.098 -37.509) (41.261 10.001)) "a" "Layout" 2))

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("sample:/\tsample test_sky130 layout" (("open" (nil hierarchy "/{test_sky130 sample layout }:a"))) (((-7.478 4.878) (-2.906 8.222)) "a" "Layout" 4))("sky130_osu_sc_18T_hs__addh_l:/\tsky130_osu_sc_18T_hs__addh_l sky130_osu_sc_t18 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t18 sky130_osu_sc_18T_hs__addh_l layout }:a"))) (((-2.675 -1.511) (9.147 7.138)) "a" "Layout" 2))("sky130_osu_sc_18T_hs__and2_2:/\tsky130_osu_sc_18T_hs__and2_2 sky130_osu_sc_t18 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t18 sky130_osu_sc_18T_hs__and2_2 layout }:a"))) (((-0.291 3.551) (5.385 7.704)) "a" "Layout" 4))("sky130_osu_sc_15T_hs__and2_2:/\tsky130_osu_sc_15T_hs__and2_2 sky130_osu_sc_t15 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t15 sky130_osu_sc_15T_hs__and2_2 layout }:a"))) (((-3.362 -1.155) (6.372 5.966)) "a" "Layout" 2))("sky130_osu_sc_12T_hs__addh_l:/\tsky130_osu_sc_12T_hs__addh_l sky130_osu_sc_t12 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t12 sky130_osu_sc_12T_hs__addh_l layout }:a"))) (((-1.599 -1.154) (8.069 5.919)) "a" "Layout" 4))("sky130_osu_sc_15T_hs__addh_1:/\tsky130_osu_sc_15T_hs__addh_1 sky130_osu_sc_t15 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t15 sky130_osu_sc_15T_hs__addh_1 layout }:a"))) (((-1.845 -1.466) (8.316 5.967)) "a" "Layout" 2))("sample:/\tsample sky130 layout" (("open" (nil hierarchy "/{sky130 sample layout }:a"))) (((-21.551 -10.001) (21.551 10.001)) "a" "Layout" 2))("L1_T:/\tL1_T sky130 symbolic" (("open" (nil hierarchy "/{sky130 L1_T symbolic }:a"))) (((-0.123 -0.086) (0.123 0.094)) "a" "Layout" 4))("sky130_osu_sc_15T_hs__and2_4:/\tsky130_osu_sc_15T_hs__and2_4 sky130_osu_sc_t15 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t15 sky130_osu_sc_15T_hs__and2_4 layout }:a"))) (((-3.295 -1.154) (6.439 5.966)) "a" "Layout" 2))("sky130_osu_sc_18T_hs__addh_1:/\tsky130_osu_sc_18T_hs__addh_1 sky130_osu_sc_t18 layout" (("open" (nil hierarchy "/{sky130_osu_sc_t18 sky130_osu_sc_18T_hs__addh_1 layout }:a"))) (((-2.44 -1.165) (8.91 7.138)) "a" "Layout" 2))

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<<<<<<< HEAD
M:0 DV:1 NT:0 N:1 C:32
M:0 DV:1 NT:0 N:2 C:32
M:0 DV:1 NT:0 N:1 C:32
=======
M:0 DV:1 NT:0 N:72 C:32
M:0 DV:1 NT:0 N:72 C:32
M:0 DV:1 NT:0 N:72 C:32
M:0 DV:1 NT:0 N:72 C:32
M:0 DV:1 NT:0 N:72 C:32
M:0 DV:1 NT:0 N:72 C:32
M:0 DV:1 NT:0 N:72 C:32
M:0 DV:1 NT:0 N:72 C:32
M:0 DV:1 NT:0 N:74 C:32
>>>>>>> 10823a628534cc8495a7a4d920792bedde1654ba

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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; SKY130 .cdsinit
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
setShellEnvVar("PDK_HOME=$HOME/sky130_cds")
envSetVal("layout" "xSnapSpacing" 'float 0.005)
envSetVal("layout" "ySnapSpacing" 'float 0.005)
setShellEnvVar("CDS_Netlisting_Mode=Analog")
setShellEnvVar("CDS_AUTO_64BIT=ALL")

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This directory contains the Virtoso library for the SKY130 PDK. This
library is meant to get a user started and may not have all the layers
associated with a given design. It is only meant to help users get
starting using Virtuoso with the SKY130 PDK. Please consult the
documentation at Skywater Technology PDK before attempting to
fabricate using these tools.
The environmental variable PDK_HOME should be set to the pdk
directory. A sample script is included but can be modified as needed.

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# File Created by James Stine at Fri Sep 16 15:14:51 2022
# assisted by CdsLibEditor
# Cadence libraries
INCLUDE $CDS_IC/share/cdssetup/cds.lib
DEFINE bmslib $CDS_IC/tools/dfII/samples/artist/bmslib
DEFINE sky130 ./sky130
# OSU Standard-Cell Libraries
DEFINE sky130_osu_sc_t18 ./sky130_osu_sc_t18
DEFINE sky130_osu_sc_t12 ./sky130_osu_sc_t12
DEFINE sky130_osu_sc_t15 ./sky130_osu_sc_t15
# Test Layout
DEFINE test_sky130 ./test_sky130

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sky130_cds/VirtuosoOA/display.drf Executable file
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sky130_cds/VirtuosoOA/layer.map Executable file
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#Layer Name Layer Purpose Layer Stream Number Datatype Stream Number
areaid analog 81 79
areaid core 81 2
areaid critCorner 81 51
areaid critSid 81 52
areaid deadZon 81 50
areaid dieCut 81 11
areaid diode 81 23
areaid esd 81 19
areaid etest 81 101
areaid extendedDrain 81 57
areaid frame 81 3
areaid frameRect 81 12
areaid hvnwell 81 63
areaid injection 81 17
areaid lowTapDensity 81 14
areaid lvNative 81 60
areaid moduleCut 81 10
areaid notCritSide 81 15
areaid opcDrop 81 54
areaid photo 81 81
areaid rdlprobepad 81 27
areaid rfdiode 81 125
areaid seal 81 1
areaid sigPadDiff 81 6
areaid sigPadMetNtr 81 8
areaid sigPadWell 81 7
areaid standardc 81 4
areaid substrateCut 81 53
areaid waffleWindow 81 13
blanking drawing 124 40
bump drawing 127 22
capacitor drawing 82 64
cbump mask 101 0
cctm1 drawing 101 44
cctm1 mask 35 0
cctm1 maskAdd 101 43
cctm1 maskDrop 101 42
ccu1m mask 93 0
cdnm drawing 110 20
cdnm mask 48 0
cdnm maskAdd 110 21
cdnm maskDrop 110 22
cfom drawing 22 20
cfom mask 23 0
cfom maskAdd 22 21
cfom maskDrop 22 22
cfom waffleDrop 22 24
chvntm drawing 38 20
chvntm mask 39 0
chvntm maskAdd 38 21
chvntm maskDrop 38 22
chvtpm drawing 88 44
chvtpm mask 97 0
chvtpm maskAdd 97 43
chvtpm maskDrop 97 42
chvtrm drawing 98 44
chvtrm mask 98 0
chvtrm maskAdd 98 43
chvtrm maskDrop 98 42
cldntm drawing 11 20
cldntm mask 11 0
cli1m drawing 115 44
cli1m mask 56 0
cli1m maskAdd 115 43
cli1m maskDrop 115 42
clicm1 drawing 106 44
clicm1 mask 43 0
clicm1 maskAdd 106 43
clicm1 maskDrop 106 42
clvom drawing 45 20
clvom mask 46 0
clvom maskAdd 45 21
clvom maskDrop 45 22
clvtnm drawing 25 44
clvtnm mask 25 0
clvtnm maskAdd 25 43
clvtnm maskDrop 25 42
cmm1 drawing 62 20
cmm1 mask 36 0
cmm1 maskAdd 62 21
cmm1 maskDrop 62 22
cmm1 waffleDrop 62 24
cmm2 drawing 105 44
cmm2 mask 41 0
cmm2 maskAdd 105 43
cmm2 maskDrop 105 42
cmm2 waffleDrop 105 52
cmm3 drawing 107 20
cmm3 mask 34 0
cmm3 maskAdd 107 21
cmm3 maskDrop 107 22
cmm3 waffleDrop 107 24
cmm4 mask 51 0
cmm4 maskAdd 112 43
cmm4 maskDrop 112 42
cmm4 waffleDrop 112 4
cmm5 mask 59 0
cmm5 waffleDrop 117 4
cncm drawing 96 44
cncm mask 17 0
cnpc drawing 44 20
cnpc mask 49 0
cnpc maskAdd 44 43
cnpc maskDrop 44 42
cnsdm drawing 29 20
cnsdm mask 30 0
cnsdm maskAdd 29 21
cnsdm maskDrop 29 22
cnsm mask 22 0
cntm drawing 26 20
cntm mask 27 0
cntm maskAdd 26 21
cntm maskDrop 26 22
cnwm drawing 109 44
cnwm mask 21 0
cnwm maskAdd 109 43
cnwm maskDrop 109 42
conom drawing 87 44
conom mask 88 0
conom maskAdd 87 43
conom maskDrop 87 42
cp1m drawing 33 44
cp1m mask 28 0
cp1m maskAdd 33 43
cp1m maskDrop 33 42
cp1m waffleDrop 33 24
cpbo mask 99 0
cpdm drawing 104 44
cpdm mask 37 0
cpdm maskAdd 104 43
cpdm maskDrop 104 42
cpmm drawing 91 44
cpmm2 mask 94 0
cpsdm drawing 31 20
cpsdm mask 32 0
cpsdm maskAdd 31 21
cpsdm maskDrop 31 22
crpm drawing 53 44
crpm mask 96 0
crpm maskAdd 53 43
crpm maskDrop 53 42
#crrpm mask 102 0
ctunm drawing 96 20
ctunm mask 20 0
ctunm maskAdd 96 21
ctunm maskDrop 96 22
cubm mask 100 0
cviam drawing 105 20
cviam mask 40 0
cviam maskAdd 105 21
cviam maskDrop 105 22
cviam2 drawing 108 20
cviam2 mask 44 0
cviam2 maskAdd 108 21
cviam2 maskDrop 108 22
cviam3 drawing 112 20
cviam3 mask 50 0
cviam3 maskAdd 112 21
cviam3 maskDrop 112 22
cviam4 drawing 117 20
cviam4 mask 58 0
cviam4 maskAdd 117 21
cviam4 maskDrop 117 22
diff boundary 65 4
diff cut 65 14
diff drawing 65 20
diff hv 65 8
diff label 65 6
diff net 65 23
diff pin 65 16
diff res 65 13
dnwell drawing 64 18
fom dummy 22 23
hvi drawing 75 20
hvntm drawing 125 20
hvtp drawing 78 44
hvtr drawing 18 20
inductor drawing 82 24
inductor label 82 25
inductor term1 82 26
inductor term2 82 27
inductor term3 82 28
ldntm drawing 11 44
li1 blockage 67 10
li1 boundary 67 4
li1 cut 67 14
li1 drawing 67 20
li1 label 67 5
li1 net 67 23
li1 pin 67 16
li1 probe 67 25
li1 res 67 13
li1 short 67 15
licon1 boundary 66 60
licon1 drawing 66 44
licon1 net 66 41
licon1 pin 66 58
lvtn drawing 125 44
marker error 83 6
marker warning 83 7
mcon boundary 67 60
mcon drawing 67 44
mcon net 67 41
mcon pin 67 48
met1 blockage 68 10
met1 boundary 68 4
met1 cut 68 14
met1 drawing 68 20
met1 label 68 5
met1 net 68 23
met1 pin 68 16
met1 probe 68 25
met1 res 68 13
met1 short 68 15
met2 blockage 69 10
met2 boundary 69 4
met2 cut 69 14
met2 drawing 69 20
met2 label 69 5
met2 net 69 23
met2 pin 69 16
met2 probe 69 25
met2 res 69 13
met2 short 69 15
met3 blockage 70 10
met3 boundary 70 4
met3 cut 70 14
met3 drawing 70 20
met3 fuse 70 17
met3 label 70 5
met3 net 70 23
met3 pin 70 16
met3 probe 70 25
met3 res 70 13
met3 short 70 15
met4 blockage 71 10
met4 boundary 71 4
met4 cut 71 14
met4 drawing 71 20
met4 fuse 71 17
met4 label 71 5
met4 net 71 23
met4 pin 71 16
met4 probe 71 25
met4 res 71 13
met4 short 71 15
met5 blockage 72 10
met5 boundary 72 4
met5 cut 72 14
met5 drawing 72 20
met5 fuse 72 17
met5 label 72 5
met5 net 72 23
met5 pin 72 16
met5 probe 72 25
met5 res 72 13
met5 short 72 15
ncm drawing 92 44
npc drawing 95 20
npn drawing 82 20
npn label 82 5
nsdm drawing 93 44
nsm drawing 61 20
nwell drawing 64 20
nwell label 64 5
nwell net 84 23
nwell pin 64 16
overlap boundary 90 4
overlap drawing 90 20
pad drawing 76 20
pad label 76 5
pad pin 76 16
padCenter drawing 81 20
pmm drawing 85 44
pmm2 drawing 77 20
pnp drawing 82 44
pnp label 82 59
poly boundary 66 4
poly cut 66 14
poly drawing 66 20
poly gate 66 9
poly label 66 5
poly model 66 83
poly net 66 23
poly pin 66 16
poly probe 66 25
poly res 66 13
poly short 66 15
prBoundary boundary 235 4
prBoundary drawing 235 0
prune drawing 84 44
psdm drawing 94 20
pwell cut 64 14
pwell drawing 64 44
pwell label 64 59
pwell pin 122 16
pwell res 64 13
pwelliso label 44 5
pwelliso pin 44 16
rdl cut 74 14
rdl drawing 74 20
rdl label 74 5
rdl pin 74 16
rdl res 74 13
rdl short 74 15
rpm drawing 86 20
#rrpm drawing 102 20
tap boundary 65 60
tap drawing 65 44
tap label 65 5
tap net 65 41
tap pin 65 48
target drawing 76 44
text drawing 83 44
tunm drawing 80 20
ubm drawing 127 21
vhvi drawing 74 21
via boundary 68 60
via drawing 68 44
via net 68 41
via pin 68 58
via2 boundary 69 60
via2 drawing 69 44
via2 net 69 41
via2 pin 69 58
via3 boundary 70 60
via3 drawing 70 44
via3 net 70 41
via3 pin 70 48
via4 boundary 71 60
via4 drawing 71 44
via4 net 71 41
via4 pin 71 48

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Assura Errors & Warnings Search (PLEASE CAREFULLY REVIEW THESE MESSAGES)
================================================================================
WARNINGS & ERRORS found in Assura NVN Run Log file
--------------------------------------------------------------------------------
ERROR (AVLVSNN-10134) : CDL parser encountered error in file '/home/jstine/Desktop/inv.sp' on line 19: unknown Cdl/Spice construct
pX3_noxref noxref_5 A A PROBETYPE=1
^^^^^^^^^^_________________________

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sky130_cds/VirtuosoOA/sky130.sh Executable file
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#!/bin/sh
setenv PDK_HOME $HOME/Desktop/sky130_cds/
#setEnvVal CDS_DISABLE_USER_DEFINED_CST_REPORT 1

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sky130_cds/VirtuosoOA/sky130/.oalib Normal file
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<?xml version="1.0"?>
<Library DMSystem="oaDMFileSys">
<oaDMFileSys libReadOnly="No"
origFileSystem="Unix"/>
</Library>

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sky130_cds/VirtuosoOA/sky130/cdsinfo.tag Normal file
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#
# This is a cdsinfo.tag file.
#
# See the "Cadence Application Infrastructure Reference Manual" for
# details on the format of this file, its semantics, and its use.
#
# The `#' character denotes a comment. Removing the leading `#'
# character from any of the entries below will activate them.
#
# CDSLIBRARY entry - add this entry if the directory containing
# this cdsinfo.tag file is the root of a Cadence library.
# CDSLIBRARY
#
# CDSLIBCHECK - set this entry to require that libraries have
# a cdsinfo.tag file with a CDSLIBRARY entry. Legal values are
# ON and OFF. By default (OFF), directories named in a cds.lib file
# do not have to have a cdsinfo.tag file with a CDSLIBRARY entry.
# CDSLIBCHECK ON
#
# DMTYPE - set this entry to define the DM system for Cadence's
# Generic DM facility. Values will be shifted to lower case.
# DMTYPE none
# DMTYPE crcs
# DMTYPE tdm
# DMTYPE sync
#
# NAMESPACE - set this entry to define the library namespace according
# to the type of machine on which the data is stored. Legal values are
# `LibraryNT' and
# `LibraryUnix'.
# NAMESPACE LibraryUnix
#
# Other entries may be added for use by specific applications as
# name-value pairs. Application documentation will describe the
# use and behaviour of these entries when appropriate.
#
# Current Settings:
#
CDSLIBRARY
DMTYPE none
NAMESPACE LibraryUnix

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sky130_cds/VirtuosoOA/sky130/tech.db Normal file
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sky130_cds/VirtuosoOA/sky130_drcRules.pvl Executable file
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incr_conn YES
results_db -drc mult_seq.drc_errors.ascii -ascii
/// Tolerance for round-off errors on skew edges
tolerance 0.001
/// Unused MaskLayers: (FOM DNM NWM HVTRM TUNM ONOM LVOM P1M NPCM LDNTM NSDM PSDM LICM1 LI1M CTM1 MM1 VIM MM2 VIM2 MM3 VIM3 MM4 VIM4 MM5 NSM PDM PBO RPM CU1M PMM2)
layer_def nwell 1000
layer_map 64 -datatype 20 1000 // nwell drawing
layer_def diff 1001
layer_map 65 -datatype 20 1001 // diff drawing
layer_def poly 1008
layer_map 66 -datatype 20 1008 // poly drawing
layer_def licon1 1012
layer_map 66 -datatype 44 1012 // licon1 drawing
layer_def li1 1013
layer_map 67 -datatype 20 1013 // li1 drawing
layer_def mcon 1014
layer_map 67 -datatype 44 1014 // mcon drawing
layer_def met1 1015
layer_map 68 -datatype 20 1015 // met1 drawing
layer_def via 1016
layer_map 68 -datatype 44 1016 // via drawing
layer_def met2 1017
layer_map 69 -datatype 20 1017 // met2 drawing
layer_def via2 1019
layer_map 69 -datatype 44 1019 // via2 drawing
layer_def met3 1020
layer_map 70 -datatype 20 1020 // met3 drawing
layer_def via3 1021
layer_map 70 -datatype 44 1021 // via3 drawing
layer_def met4 1022
layer_map 71 -datatype 20 1022 // met4 drawing
layer_def via4 1023
layer_map 71 -datatype 44 1023 // via4 drawing
layer_def met5 1024
layer_map 72 -datatype 20 1024 // met5 drawing
layer_def pad 1026
layer_map 76 -datatype 20 1026 // pad drawing
layer_def capacitor 1031
layer_map 82 -datatype 64 1031 // capacitor drawing
layer_def inductor 1034
layer_map 82 -datatype 24 1034 // inductor drawing
layer_def polyGate 1074
layer_map 66 -datatype 9 1074 // poly gate
layer_def padText 1089
layer_map 76 -texttype 5 1089 // pad label
layer_def diffLabel 1090
layer_map 65 -datatype 6 1090 // diff label
layer_def nwellLabel 1092
layer_map 64 -datatype 5 1092 // nwell label
layer_def polyLabel 1093
layer_map 66 -datatype 5 1093 // poly label
layer_def met1Label 1094
layer_map 68 -datatype 5 1094 // met1 label
layer_def met2Label 1095
layer_map 69 -datatype 5 1095 // met2 label
layer_def met3Label 1096
layer_map 70 -datatype 5 1096 // met3 label
layer_def met4Label 1097
layer_map 71 -datatype 5 1097 // met4 label
layer_def met5Label 1098
layer_map 72 -datatype 5 1098 // met5 label
layer_def li1Block 1099
layer_map 67 -datatype 10 1099 // li1 blockage
layer_def met1Block 1100
layer_map 68 -datatype 10 1100 // met1 blockage
layer_def met2Block 1101
layer_map 69 -datatype 10 1101 // met2 blockage
layer_def met3Block 1102
layer_map 70 -datatype 10 1102 // met3 blockage
layer_def met4Block 1103
layer_map 71 -datatype 10 1103 // met4 blockage
layer_def met5Block 1104
layer_map 72 -datatype 10 1104 // met5 blockage
layer_def diffBndry 1106
layer_map 65 -datatype 4 1106 // diff boundary
layer_def mconBndry 1108
layer_map 67 -datatype 60 1108 // mcon boundary
layer_def polyBndry 1109
layer_map 66 -datatype 4 1109 // poly boundary
layer_def viaBndry 1110
layer_map 68 -datatype 60 1110 // via boundary
layer_def via2Bndry 1111
layer_map 69 -datatype 60 1111 // via2 boundary
layer_def via3Bndry 1112
layer_map 70 -datatype 60 1112 // via3 boundary
layer_def via4Bndry 1113
layer_map 71 -datatype 60 1113 // via4 boundary
layer_def li1tt 1114 1115 1116 1117
layer_map 67 -texttype 20 1114 // li1 drawing
layer_map 67 -texttype 5 1115 // li1 label
layer_map 67 -texttype 23 1116 // li1 net
layer_map 67 -texttype 16 1117 // li1 pin
layer_def met1tt 1118 1119 1120 1121
layer_map 68 -texttype 20 1118 // met1 drawing
layer_map 68 -texttype 5 1119 // met1 label
layer_map 68 -texttype 23 1120 // met1 net
layer_map 68 -texttype 16 1121 // met1 pin
layer_def met2tt 1122 1123 1124 1125
layer_map 69 -texttype 20 1122 // met2 drawing
layer_map 69 -texttype 5 1123 // met2 label
layer_map 69 -texttype 23 1124 // met2 net
layer_map 69 -texttype 16 1125 // met2 pin
layer_def met3tt 1126 1127 1128 1129
layer_map 70 -texttype 20 1126 // met3 drawing
layer_map 70 -texttype 5 1127 // met3 label
layer_map 70 -texttype 23 1128 // met3 net
layer_map 70 -texttype 16 1129 // met3 pin
layer_def met4tt 1130 1131 1132 1133
layer_map 71 -texttype 20 1130 // met4 drawing
layer_map 71 -texttype 5 1131 // met4 label
layer_map 71 -texttype 23 1132 // met4 net
layer_map 71 -texttype 16 1133 // met4 pin
layer_def met5tt 1134 1135 1136 1137
layer_map 72 -texttype 20 1134 // met5 drawing
layer_map 72 -texttype 5 1135 // met5 label
layer_map 72 -texttype 23 1136 // met5 net
layer_map 72 -texttype 16 1137 // met5 pin
layer_def polytt 1138 1139 1140 1141
layer_map 66 -texttype 20 1138 // poly drawing
layer_map 66 -texttype 5 1139 // poly label
layer_map 66 -texttype 23 1140 // poly net
layer_map 66 -texttype 16 1141 // poly pin
layer_def difftt 1142 1143 1144 1145
layer_map 65 -texttype 20 1142 // diff drawing
layer_map 65 -texttype 6 1143 // diff label
layer_map 65 -texttype 23 1144 // diff net
layer_map 65 -texttype 16 1145 // diff pin
layer_def poly_pin 1146
layer_map 66 -datatype 16 1146 // poly pin
layer_def li1_pin 1147
layer_map 67 -datatype 16 1147 // li1 pin
layer_def met1_pin 1148
layer_map 68 -datatype 16 1148 // met1 pin
layer_def met2_pin 1149
layer_map 69 -datatype 16 1149 // met2 pin
layer_def met3_pin 1150
layer_map 70 -datatype 16 1150 // met3 pin
layer_def met4_pin 1151
layer_map 71 -datatype 16 1151 // met4 pin
layer_def met5_pin 1152
layer_map 72 -datatype 16 1152 // met5 pin
layer_def nwellpt 1153
layer_map 64 -texttype 16 1153 // nwell pin
layer_map 64 -texttype 0 1153 // nwell pin
layer_def polypt 1154
layer_map 66 -texttype 16 1154 // poly pin
layer_map 66 -texttype 0 1154 // poly pin
layer_def li1pt 1155
layer_map 67 -texttype 16 1155 // li1 pin
layer_map 67 -texttype 0 1155 // li1 pin
layer_def met1pt 1156
layer_map 68 -texttype 16 1156 // met1 pin
layer_map 68 -texttype 0 1156 // met1 pin
layer_def met2pt 1157
layer_map 69 -texttype 16 1157 // met2 pin
layer_map 69 -texttype 0 1157 // met2 pin
layer_def met3pt 1158
layer_map 70 -texttype 16 1158 // met3 pin
layer_map 70 -texttype 0 1158 // met3 pin
layer_def met4pt 1159
layer_map 71 -texttype 16 1159 // met4 pin
layer_map 71 -texttype 0 1159 // met4 pin
layer_def met5pt 1160
layer_map 72 -texttype 16 1160 // met5 pin
layer_map 72 -texttype 0 1160 // met5 pin
layer_def padtt 1167 1089
layer_map 76 -texttype 20 1167 // pad drawing
// 1089 -> pad label
layer_def pad_pin 1168
layer_map 76 -datatype 16 1168 // pad pin
layer_def padpt 1169
layer_map 76 -texttype 16 1169 // pad pin
layer_map 76 -texttype 0 1169 // pad pin
layer_def met5Pin 1152
// 1152 -> met5 pin
layer_def met4Pin 1151
// 1151 -> met4 pin
layer_def met3Pin 1150
// 1150 -> met3 pin
layer_def met2Pin 1149
// 1149 -> met2 pin
layer_def met1Pin 1148
// 1148 -> met1 pin
layer_def li1Pin 1147
// 1147 -> li1 pin
layer_def polyPin 1146
// 1146 -> poly pin
layer_def diffPin 1222
layer_map 65 -datatype 16 1222 // diff pin
treat_non_baselayer_as_toplayer yes
base_layer diff
base_layer poly
layer_def pwellLabel 1229
layer_map 64 -datatype 59 1229 // pwell label
layer_def pwelltt 1230
layer_map 64 -texttype 59 1230 // pwell label
layer_def pwell_pin 1231
layer_map 122 -datatype 16 1231 // pwell pin
layer_def pwellpt 1232
layer_map 122 -texttype 16 1232 // pwell pin
layer_map 122 -texttype 0 1232 // pwell pin
copy inductor -outputlayer inductor_exempt
and diff nwell -outputlayer PDIFF
not diff nwell -outputlayer NDIFF
not diff poly -outputlayer SRCDRN
and poly diff -outputlayer POLYandDIFF
copy POLYandDIFF -outputlayer GATE
edge_boolean -inside GATE diff -outputlayer GATESIDE
edge_boolean -coincident_only -inside GATE diff -outputlayer GATEEND
//edge_boolean -coincident_only -outside diff tap -outputlayer diffTapEdge
copy GATE -outputlayer MOSGATE
copy MOSGATE -outputlayer EMOSGATE
disconnect
//and npc licon1 -outputlayer npccon
//connect dnwell nwell
//connect nwell tap -by NTAP
//connect tap li1 -by licon1
//connect poly li1 -by npccon
connect li1 met1 -by mcon
connect met1 met2 -by via
connect met3 met2 -by via2
connect met3 met4 -by via3
connect met4 met5 -by via4
connect met5 pad
rule "R0_nwell_X1" {
caption "nwell_X1: off 0.005 grid nwell vertex"
offgrid nwell 5
}
rule "R1_diff_X1" {
caption "diff_X1: off 0.005 grid diff vertex"
offgrid diff 5
}
rule "R2_poly_X1" {
caption "poly_X1: off 0.005 grid poly vertex"
offgrid poly 5
}
rule "R3_li1_X1" {
caption "li1_X1: off 0.005 grid li1 vertex"
offgrid li1 5
}
rule "R4_mcon_X1" {
caption "mcon_X1: off 0.005 grid mcon vertex"
offgrid mcon 5
}
rule "R5_met1_X1" {
caption "met1_X1: off 0.005 grid met1 vertex"
offgrid met1 5
}
rule "R6_via_X1" {
caption "via_X1: off 0.005 grid via vertex"
offgrid via 5
}
rule "R7_met2_X1" {
caption "met2_X1: off 0.005 grid met2 vertex"
offgrid met2 5
}
rule "R8_via2_X1" {
caption "via2_X1: off 0.005 grid via2 vertex"
offgrid via2 5
}
rule "R9_met3_X1" {
caption "met3_X1: off 0.005 grid met3 vertex"
offgrid met3 5
}
rule "R10_via3_X1" {
caption "via3_X1: off 0.005 grid via3 vertex"
offgrid via3 5
}
rule "R11_met4_X1" {
caption "met4_X1: off 0.005 grid met4 vertex"
offgrid met4 5
}
rule "R12_via4_X1" {
caption "via4_X1: off 0.005 grid via4 vertex"
offgrid via4 5
}
rule "R13_met5_X1" {
caption "met5_X1: off 0.005 grid met5 vertex"
offgrid met5 5
}
rule "R14_pad_X1" {
caption "pad_X1: off 0.005 grid pad vertex"
offgrid pad 5
}
rule "R15_cap_X1" {
caption "cap_X1: off 0.005 grid capacitor vertex"
offgrid capacitor 5
}
rule "R16_ind_X1" {
caption "ind_X1: off 0.005 grid inductor vertex"
offgrid inductor 5
}
rule "R17_nwell_X2" {
caption "nwell_X2: non-octagonal nwell edge"
angle nwell -ltgt 0 45
angle nwell -ltgt 45 90
}
rule "R18_diff_X2" {
caption "diff_X2: non-octagonal diff edge"
angle diff -ltgt 0 45
angle diff -ltgt 45 90
}
rule "R19_met1_X2" {
caption "met1_X2: non-octagonal met1 edge"
angle met1 -ltgt 0 45
angle met1 -ltgt 45 90
}
rule "R20_met2_X2" {
caption "met2_X2: non-octagonal met2 edge"
angle met2 -ltgt 0 45
angle met2 -ltgt 45 90
}
rule "R21_met3_X2" {
caption "met3_X2: non-octagonal met3 edge"
angle met3 -ltgt 0 45
angle met3 -ltgt 45 90
}
rule "R22_met4_X2" {
caption "met4_X2: non-octagonal met4 edge"
angle met4 -ltgt 0 45
angle met4 -ltgt 45 90
}
rule "R23_met5_X2" {
caption "met5_X2: non-octagonal met5 edge"
angle met5 -ltgt 0 45
angle met5 -ltgt 45 90
}
rule "R24_cap_X2" {
caption "cap_X2: non-octagonal capacitor edge"
angle capacitor -ltgt 0 45
angle capacitor -ltgt 45 90
}
rule "R25_ind_X2" {
caption "ind_X2: non-octagonal inductor edge"
angle inductor -ltgt 0 45
angle inductor -ltgt 45 90
}

6
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/.oalib Normal file
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<?xml version="1.0"?>
<Library DMSystem="oaDMFileSys">
<oaDMFileSys libReadOnly="No"
origFileSystem="Unix"/>
</Library>

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sky130_cds/VirtuosoOA/sky130_osu_sc_t12/cdsinfo.tag Normal file
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#
# This is a cdsinfo.tag file.
#
# See the "Cadence Application Infrastructure Reference Manual" for
# details on the format of this file, its semantics, and its use.
#
# The `#' character denotes a comment. Removing the leading `#'
# character from any of the entries below will activate them.
#
# CDSLIBRARY entry - add this entry if the directory containing
# this cdsinfo.tag file is the root of a Cadence library.
# CDSLIBRARY
#
# CDSLIBCHECK - set this entry to require that libraries have
# a cdsinfo.tag file with a CDSLIBRARY entry. Legal values are
# ON and OFF. By default (OFF), directories named in a cds.lib file
# do not have to have a cdsinfo.tag file with a CDSLIBRARY entry.
# CDSLIBCHECK ON
#
# DMTYPE - set this entry to define the DM system for Cadence's
# Generic DM facility. Values will be shifted to lower case.
# DMTYPE none
# DMTYPE crcs
# DMTYPE tdm
# DMTYPE sync
#
# NAMESPACE - set this entry to define the library namespace according
# to the type of machine on which the data is stored. Legal values are
# `LibraryNT' and
# `LibraryUnix'.
# NAMESPACE LibraryUnix
#
# Other entries may be added for use by specific applications as
# name-value pairs. Application documentation will describe the
# use and behaviour of these entries when appropriate.
#
# Current Settings:
#
CDSLIBRARY
DMTYPE none
NAMESPACE LibraryUnix

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-- Master.tag File, Rev:1.0
layout.oa

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layout.oa

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sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__and2_8/layout/master.tag Normal file
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@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__and2_l/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__and2_l/layout/master.tag Normal file
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@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__ant/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__ant/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__antfill/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__antfill/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__aoi21_l/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__aoi21_l/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__aoi22_l/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__aoi22_l/layout/master.tag Normal file
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@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_1/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_1/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_2/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_2/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_4/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_4/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_6/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_6/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_8/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_8/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_l/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__buf_l/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__decap_1/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__decap_1/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__decap_l/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__decap_l/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__dff_1/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__dff_1/layout/master.tag Normal file
View File

@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__dff_l/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__dff_l/layout/master.tag Normal file
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@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

BIN
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__dffr_1/layout/layout.oa Normal file
View File

Binary file not shown.

2
sky130_cds/VirtuosoOA/sky130_osu_sc_t12/sky130_osu_sc_12T_hs__dffr_1/layout/master.tag Normal file
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@ -0,0 +1,2 @@
-- Master.tag File, Rev:1.0
layout.oa

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