fet_simulator: added docstrings
Signed-off-by: Grzegorz Latosinski <glatosinski@antmicro.com>
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@ -29,7 +29,18 @@ import sys
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logger = Logging.setup_logging()
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def create_test_circuit(fet_type, iparam, fet_L, fet_W, corner_path):
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def create_test_circuit(fet_type, fet_L, fet_W, corner_path):
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"""
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Creates a simple test circuit that contains only given FET.
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Parameters
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----------
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fet_type: name of the FET model
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fet_L: FET length
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fet_W: FET width
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corner_path:
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path to the spice corner file with model definitions and parameters
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"""
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c = Circuit('gm_id')
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c.include(corner_path)
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@ -45,6 +56,17 @@ def create_test_circuit(fet_type, iparam, fet_L, fet_W, corner_path):
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def run_sim(c, iparam, fet_W):
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"""
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Runs simulation for a given circuit with FET cell.
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Parameters
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----------
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c: circuit to simulate
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iparam:
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template string for creating internal parameter names (gm, id, gds,
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cgg) for a given FET
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fet_W: FET width
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"""
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sim = c.simulator()
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sim.save_internal_parameters(
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iparam % 'gm', iparam % 'id', iparam % 'gds', iparam % 'cgg'
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@ -75,6 +97,14 @@ def run_sim(c, iparam, fet_W):
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def init_plots(fet_name, W):
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"""
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Initializes plots for FET bins simulation.
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Parameters
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----------
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fet_name: name of the current FET cell
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W: FET width
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"""
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figs = [plt.figure(), plt.figure(), plt.figure(), plt.figure()]
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plts = [f.subplots() for f in figs]
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figs[0].suptitle(f'{fet_name} Id/W vs gm/Id (W = {W})')
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@ -97,6 +127,20 @@ def init_plots(fet_name, W):
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def gen_plots(gm_id, id_W, ft, gm_gds, vsweep, fet_W, fet_L, plts):
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"""
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Generates plot lines for FET bins simulation parameters.
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Parameters
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----------
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gm_id: gm/Id values
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id_W: Id/W values
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ft: f_T values
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gm_gds: gm/gds values
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vsweep: v-sweep values
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fet_W: FET width
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fet_L: FET length
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plts: plots on which plot lines should be drawn
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"""
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# plot some interesting things
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plts[0].plot(gm_id, id_W, label=f'W {fet_W} x L {fet_L}')
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plts[1].plot(gm_id, ft, label=f'W {fet_W} x L {fet_L}')
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@ -105,11 +149,17 @@ def gen_plots(gm_id, id_W, ft, gm_gds, vsweep, fet_W, fet_L, plts):
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def close_plots(figs):
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"""
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Closes plots.
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"""
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for f in figs:
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plt.close(f)
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def read_bins(fname):
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"""
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Reads bins CSV file.
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"""
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with open(fname, 'r') as f:
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r = csv.reader(f)
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# drop CSV header
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@ -127,6 +177,18 @@ def generate_fet_plots(
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outprefix,
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only_W=None,
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ext='svg'):
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"""
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Generates FET bins plots.
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Parameters
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----------
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corner_path: Path to FET model definitions and parameters
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bins_csv: Path to the CSV file with bin parameters and FET model names
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outdir: Directory where outputs should be stored
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outprefix: Prefix for the output plot images
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only_W: List of FET widths for which the plots should be generated
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ext: extension for plot files
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"""
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print(f'[generate_fet_plots] {corner_path} {bins_csv}' +
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f'{outdir} {outprefix} {only_W}')
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@ -147,7 +209,7 @@ def generate_fet_plots(
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iparam = f'@m.xm1.m{fet_type}[%s]'
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# fet_W and fet_L values here are only for initialization, they are
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# later changed in the for loop
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c = create_test_circuit(fet_type, iparam, 0.15, 1, corner_path)
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c = create_test_circuit(fet_type, 0.15, 1, corner_path)
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figs, plts = init_plots(fet_type, W)
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try:
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