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docs: Adding details for various supported devices. 

Each type of device includes;
 - General device description
 - Details about the spice model and operating conditions.
 - Images of the symbols for the device.
 - Image showing the cross-section of the device.

The devices included are;
 - Bipolar (NPN)
 - Bipolar (PNP)
 - MiM Capacitor
 - Vertical Parallel Plate (VPP) capacitors
 - SONOS cells
 - SRAM cells
 - Diodes
 - 11V/16V NMOS FET
 - 1.8V NMOS FET
 - 1.8V low-VT NMOS FET
 - 20V NMOS FET
 - 20V isolated NMOS FET
 - 20V native NMOS FET
 - 20V NMOS zero-VT FET
 - 3.0V and 5.0V native NMOS FET
 - 5.0V/10.5V NMOS FET
 - NMOS ESD FET
 - 10V/16V PMOS FET
 - 1.8V PMOS FET
 - 1.8V high-VT PMOS FET
 - 1.8V low-VT PMOS FET
 - 20V PMOS FET
 - 5.0V/10.5V PMOS FET
 - Generic Resistors
 - P- poly precision resistors
 - P+ poly precision resistors
 - Varactors

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>

Temp.
This commit is contained in:
Tim 'mithro' Ansell 2020-07-27 13:38:57 -07:00
parent fa5e348b4a
commit 788451177d
159 changed files with 68099 additions and 0 deletions
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2
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@ -23,4 +23,6 @@ SkyWater SKY130 Process Design Rules
rules/rcx rules/rcx
rules/device-details
rules/errors rules/errors

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#!/usr/bin/env python3
import re
import os
from pathlib import Path
RE_IMAGE = re.compile('.. (.*) image:: (.*)')
RE_INCLUDE = re.compile('.. include:: (.*)')
print('Device Details')
print('==============')
print()
for fname in sorted(Path('.').rglob('index.rst')):
with open(fname) as f:
data = f.read()
dirname = os.path.split(fname)[0]
data = RE_IMAGE.sub(r'.. \1 image:: {}/\2'.format(dirname), data)
data = RE_INCLUDE.sub(r'.. include:: {}/\1'.format(dirname), data)
print(data)

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.. list-table::
:header-rows: 1
:stub-columns: 1
* - Parameter
- NOM
- LSL
- USL
- Units
- Description
* - BFNPN1X1\_10P0
- 37.5
- 18.14
- 56.93
-
- NPN forward Current Gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =10 µA
* - BFNPN1X1\_1P0
- 36.72
- 17.97
- 55.38
-
- NPN forward Current Gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =1.0 µA
* - BFNPN1X2\_17P5
- 35.14
- 16.98
- 53.37
-
- NPN forward Current Gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =17.5 µA
* - BFNPN1X2\_1P75
- 34.57
- 16.89
- 52.2
-
- NPN forward Current Gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =1.75 µA
* - BFNPNPOLY\_3P16
- 125.28
- 62.37
- 500
-
- NPN forward Current Gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =3.16 µA
* - BFNPNPOLY\_P316
- 106.98
- 55.94
- 500
-
- NPN forward Current Gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =0.316 µA
* - VBENPN1X1\_10P0
- 0.7745
- 0.7645
- 0.7845
- V
- NPN emitter-base voltage at I\ :sub:`E`\ =10 µA
* - VBENPN1X1\_1P0
- 0.712
- 0.702
- 0.722
- V
- NPN emitter-base voltage at I\ :sub:`E`\ =1.0 µA
* - VBENPN1X2\_17P5
- 0.7745
- 0.7645
- 0.7845
- V
- NPN emitter-base voltage at I\ :sub:`E`\ =17.5 µA
* - VBENPN1X2\_1P75
- 0.712
- 0.702
- 0.722
- V
- NPN emitter-base voltage at I\ :sub:`E`\ =1.75 µA
* - VBENPNPOLY\_3P16
- 0.7073
- 0.6933
- 0.7213
- V
- NPN emitter-base voltage at I\ :sub:`E`\ =3.16 µA
* - VBENPNPOLY\_P316
- 0.6452
- 0.6312
- 0.6591
- V
- NPN emitter-base voltage at I\ :sub:`E`\ =0.316 µA

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Bipolar (NPN)
-------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__npn4`
- Model Names: :model:`sky130_fd_pr_base__npnpar1x1`, :model:`sky130_fd_pr_base__npnpar1x2`, :model:`sky130_fd_pr_base__npn_1x1_2p0_hv`
Operating regime where SPICE models are valid
- \|V\ :sub:`CE`\ \| = 0 to 5.0V
- \|V\ :sub:`BE`\ \| = 0 to 5.0V
- I\ :sub:`CE` = 0.01 to 10 µA/µm\ :sup:`2`
Details
~~~~~~~
The SKY130 process offers “free” NPN devices. The NPN uses the deep n-well as the collector. The device is not optimized, and must be used in the forward-active mode. The following sizes of NPN’s are available:
- ungated device with emitter 1.0 x 1.0
- ungated device with emitter 1.0 x 2.0
- poly-gated version with octagonal emitter of A = 1.97 µm\ :sup:`2`
The :model:`sky130_fd_pr_base__npn_1x1_2p0_hv` device has a poly gate placed between the emitter and base diffusions, to prevent carrier recombination at the STI edge and increase β. The poly gate is connected to the emitter terminal.
Using this device must be done in conjunction with the correct guard rings, to avoid potential latchup issues with nearby circuitry. Reverse-active mode operation of the BJT’s are neither modeled nor permitted. E-test specs for the NPN devices are shown in the table below:
.. include:: bipolar-npn-table0.rst
Symbols for the npnpar are shown below
|symbol-bipolar-npn-1| |symbol-bipolar-npn-2| |symbol-bipolar-npn-3|
The cross-section of the :model:`sky130_fd_pr_base__npnpar1x1`/:model:`sky130_fd_pr_base__npnpar1x2` is shown below.
|cross-section-bipolar-npnpar1x|
The cross-section of the :model:`sky130_fd_pr_base__npn_1x1_2p0_hv` is shown below. The poly gate is tied to the emitter to prevent the parasitic MOSFET from turning on.
|cross-section-bipolar-npn_1x1_2p0_hv|
.. |symbol-bipolar-npn-1| image:: symbol-bipolar-npn-1.svg
.. |symbol-bipolar-npn-2| image:: symbol-bipolar-npn-2.svg
.. |symbol-bipolar-npn-3| image:: symbol-bipolar-npn-3.svg
.. |cross-section-bipolar-npnpar1x| image:: cross-section-bipolar-npnpar1x.svg
.. |cross-section-bipolar-npn_1x1_2p0_hv| image:: cross-section-bipolar-npn_1x1_2p0_hv.svg

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.. list-table::
:header-rows: 1
:stub-columns: 1
* - Parameter
- NOM
- LSL
- USL
- Units
- Description
* - BF0P68\_0P5
- 14.29
- 7.51
- 21.02
-
- PNP forward current gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =0.5 µA
* - BF0P68\_5
- 12.58
- 6.59
- 18.59
-
- PNP forward current gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =5.0 µA
* - VBE0P68\_0P5
- 0.7180
- 0.7120
- 0.7240
- V
- PNP emitter-base voltage at I\ :sub:`E`\ =0.5 µA
* - VBE0P68\_5
- 0.7847
- 0.7790
- 0.7904
- V
- PNP emitter-base voltage at I\ :sub:`E`\ =5.0 µA
* - BF3P4\_0P1
- 13.20
- 5.93
- 20.20
-
- PNP forward current gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =0.1 µA
* - BF3P4\_10
- 14.65
- 6.10
- 23.10
-
- PNP forward current gain (I:sub:`C`/I:sub:`B`) at I\ :sub:`E`\ =1.0 µA
* - VBE3P4\_0P1
- 0.6129
- 0.6087
- 0.6172
- V
- PNP emitter-base voltage at I\ :sub:`E`\ =0.1 µA
* - VBE3P4\_10
- 0.7351
- 0.7308
- 0.7393
- V
- PNP emitter-base voltage at I\ :sub:`E`\ =1.0 µA

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Bipolar (PNP)
-------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__pnp4`
- Model Names: :model:`sky130_fd_pr_base__pnppar`, :model:`sky130_fd_pr_base__pnppar5x`
Operating regime where SPICE models are valid
- \|V\ :sub:`CE`\ \| = 0 to 5.0V
- \|V\ :sub:`BE`\ \| = 0 to 5.0V
- I\ :sub:`CE` = 0.01 to 10 µA/µm\ :sup:`2`
Details
~~~~~~~
The SKY130 process offer a “free” PNP device, which utilizes the substrate as the collector. This device is not independently optimized, and can be used in forward-active mode. The following sizes of PNP are available:
- ungated device with emitter 0.68 x 0.68 (A=0.4624 µm\ :sup:`2`)
- ungated device with emitter 3.4 x 3.4 (A=11.56 µm\ :sup:`2`)
Using this device must be done in conjunction with the correct guard rings, to avoid potential latchup issues with nearby circuitry. Reverse-active mode operation of the BJT’s are neither modeled nor permitted.
E-test specs for these devices are shown in the table below:
.. include:: bipolar-pnp-table0.rst
Symbols for the :model:`sky130_fd_pr_base__pnppar` is shown below
|symbol-bipolar-a| |symbol-bipolar-b|
The cross-section of the pnp is shown below.
No deep n-well exists in this device; the collector is the substrate.
|cross-section-bipolar|
.. |symbol-bipolar-a| image:: symbol-bipolar-a.svg
.. |symbol-bipolar-b| image:: symbol-bipolar-b.svg
.. |cross-section-bipolar| image:: cross-section-bipolar.svg

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docs/rules/device-details/capacitors-mim/capacitors-mim-table0.rst Normal file
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.. list-table::
:header-rows: 1
:stub-columns: 1
* - Parameter
- NOM
- LSL
- USL
- Units
- Description
* - CMIMA
- 2
- 1.8
- 2.2
- fF/µm\ :sup:`2`
- MiM cap area capacitance
* - CMIMP
- 0.19
- 0.11
- 0.27
- fF/µm
- MiM cap periphery capacitance
* - RSCAPM
- 5.8
- 4.8
- 6.8
- Ω/□
- MiM top plate sheet resistance
* - CMIM2A
- 2
- 1.8
- 2.2
- fF/µm\ :sup:`2`
- MiM2 cap area capacitance
* - CMIM2P
- 0.19
- 0.11
- 0.27
- fF/µm
- MiM2 cap periphery capacitance
* - RSCAPM
- 5.8
- 4.8
- 6.8
- Ω/sq
- MiM2 top plate sheet resistance

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MiM Capacitor
-------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__mimcap34`, :cell:`sky130_fd_pr_base__mimcap45`
- Model Names: :model:`sky130_fd_pr_base__xcmimc`, :model:`sky130_fd_pr_base__xcmim2c`
Operating Voltages where SPICE models are valid
- \|V\ :sub:`c0` – V\ :sub:`c1`\ \| = 0 to 5.0V
Details
~~~~~~~
The MiM capacitor is constructed using a thin dielectric over metal, followed by a thin conductor layer on top of the dielectric. There are two possible constructions:
- CAPM over Metal-3
- CAP2M over Metal-4
The constructions are identical, and the capacitors may be stacked to maximize total capacitance.
Electrical specs are listed below:
.. include:: capacitors-mim-table0.rst
The symbol for the MiM capacitor is shown below. Note that the cap model is a sub-circuit which accounts for the parasitic contact resistance and the parasitic capacitance from the bottom plate to substrate.
|symbol-capacitor-mim|
Cell name
M \* W \* L
Calc capacitance
The cross-section of the “stacked” MiM capacitor is shown below:
|cross-section-capacitor-mim|
.. |symbol-capacitor-mim| image:: symbol-capacitor-mim.svg
.. |cross-section-capacitor-mim| image:: cross-section-capacitor-mim.svg

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.. list-table::
:header-rows: 1
:stub-columns: 1
* - Parameter
- NOM
- LSL
- USL
- Units
- Description
* - CGGIVPPNATIVE
- 340.9
- 310.8
- 386
- fF/cell
- xcmvppx4\_2xnhvnative10x4, in inversion
* - VPP100LISM1M2M3
- 96.99
- 82.92
- 111.05
- fF/cell
- xcmvpp11p5x11p7\_m3\_lishield
* - VPP100M1M2
- 74.6
- 57.82
- 91.39
- fF/cell
- xcmvpp11p5x11p7\_m1m2
* - VPP100M1M4M5S
- 108.4
- 92.79
- 124
- fF/cell
- xcmvpp11p5x11p7\_m1m4m5shield
* - VPP12LISM1M2M3
- 10.69
- 8.29
- 13.1
- fF/cell
- xcmvpp4p4x4p6\_m3\_lishield
* - VPP12M1M2
- 7.81
- 6.05
- 9.57
- fF/cell
- xcmvpp4p4x4p6\_m1m2
* - VPP1LIM1M2
- 0.78
- 0.62
- 0.95
- fF/cell
- xcmvpp1p8x1p8
* - VPP25PYSM1M4M5S
- 42.11
- TBD
- TBD
- fF/cell
- xcmvpp6p8x6p1\_polym5shield
* - VPP50LISM123M5S
- 42.75
- 33.35
- 50.87
- fF/cell
- xcmvpp8p6x7p9\_m3\_lim5shield
* - VPP50LISM1M2M3
- TBD
- 34.63
- 50.87
- fF/cell
- xcmvpp8p6x7p9\_m3\_lishield
* - VPPSYM3
- 35
- 24.5
- 45.5
- fF/cell
- xcmvpp3
* - VPPSYM4
- 9.48
- 6.64
- 12.32
- fF/cell
- xcmppp4
* - VPPSYM5
- 4.37
- 3.06
- 5.68
- fF/cell
- xcmvpp5
* - VPP\_100\_LIM5S
- 116.75
- 99.94
- 133.56
- fF/cell
- xcmvpp11p5x11p7\_lim5shield
* - VPP\_100\_M3S
- 97.56
- 84.63
- 110.79
- fF/cell
- xcmvpp11p5x11p7\_m3shield
* - VPP\_100\_M4S
- 118.5
- 94.82
- 142.2
- fF/cell
- xcmvpp11p5x11p7\_m4shield
* - VPP\_100\_M5S
- 137.45
- 117.66
- 157.24
- fF/cell
- xcmvpp11p5x11p7\_m5shield
* - VPP\_100\_POLYM4S
- 121.9
- 97.51
- 146.3
- fF/cell
- xcmvpp11p5x11p7\_polym4shield
* - VPP\_100\_POLYM5S
- 141.23
- 120.89
- 161.57
- fF/cell
- xcmvpp11p5x11p7\_polym5shield

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Vertical Parallel Plate (VPP) capacitors
----------------------------------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__cap_int3_vppcap`
- Model Names: :model:`sky130_fd_pr_base__xcmvppXxY _{MMshield}`
- X and Y are size dimentions
- {MMshield} refers to metal layer used as shield
Operating Voltages where SPICE models are valid
- \|V\ :sub:`c0` – V\ :sub:`c1`\ \| = 0 to 5.5V
Details
~~~~~~~
The VPP caps utilize the tight spacings of the metal lines to create capacitors using the available metal layers. The fingers go in opposite directions to minimize alignment-related variability, and the capacitor sits on field oxide to minimize silicon capacitance effects. A schematic diagram of the layout is shown below:
M3
**M2**
LI
M1
LAYOUT of M2, M3, M4
LAYOUT of LI and M1 (with POLY sheet)
**POLY**
**M4**
These capacitors are fixed-size, and they can be connected together to multiply the effective capacitance of a given node. There are multiple constructions under two different cell names:
cap\_int3—these are older versions, where stacked metal lines run parallel
- xcmvpp3 (M1 \|\| M2 only, 7.84 x 8.58)
- xcmvpp4 (M1 \|\| M2 only, 4.38 x 4.59)
- xcmvpp5 (M1 \|\| M2 only, 2.19 x 4.59)
- xcmvpp4p4x4p6\_m1m2 (M1 :sub:`┴` M2, 4.4 x 4.6, 4 quadrants)
- xcmvpp11p5x11p7\_m1m2 (M1 :sub:`┴` M2, 11.5 x 11.7, 4 quadrants)
- xcmvpp\_hd5\_4x2
- xcmvpp\_hd5\_atlas\_fingercap\_l5 (M1 \|\| M2 \|\| M3 \|\| M4, 2.7 x 5.0)
- xcmvpp\_hd5\_atlas\_fingercap2\_l5 (M1 \|\| M2 \|\| M3 \|\| M4, 2.85 x 5.0)
- xcmvpp\_hd5\_atlas\_fingercap\_l10 (M1 \|\| M2 \|\| M3 \|\| M4, 2.7 x 10.0)
- xcmvpp\_hd5\_atlas\_fingercap\_l20 (M1 \|\| M2 \|\| M3 \|\| M4, 2.7 x 20.0)
- xcmvpp\_hd5\_atlas\_fingercap\_l40 (M1 \|\| M2 \|\| M3 \|\| M4, 2.7 x 40.0)
The symbol for the cap\_int3 is shown below. The terminals c0 and c1 represent the two sides of the capacitor, with b as the body (sub or well).
|symbol-capacitor-vpp-cap_int3|
cap\_int3
vppcap—newer versions, where stacked metal lines run perpendicular and there are shields on top and bottom
- xcmvpp11p5x11p7\_m5shield (11.5x11.7, with M5 shield)
- xcmvpp11p5x11p7\_polym5shield (11.5x11.7, with poly and M5 shield)
- xcmvpp11p5x11p7\_lim5shield (11.5x11.7, with LI and M5 shield)
- xcmvpp4p4x4p6\_m3\_lim5shield (4.4x4.6, M3 float, LI / M5 shield)
- xcmvpp8p6x7p9\_m3\_lim5shield (8.6x7.9, M3 float, LI / M5 shield)
- xcmvpp11p5x11p7\_m3\_lim5shield (11.5x11.7, M3 float, LI / M5 shield)
- xcmvpp11p5x11p7\_m4shield (11.5x11.7, with M4 shield)
- xcmvpp6p8x6p1\_polym4shield (6.8x6.1, with poly and M4 shield)
- xcmvpp6p8x6p1\_lim4shield (6.8x6.1, with LI and M4 shield)
- xcmvppx4x2xnhative10x4 (11.5x11.7, over 2 nhvnative of 10/4 each)
The symbol for the vppcap is shown below. The terminals c0 and c1 are the two capacitor terminals, “top” represents the top shield and “sub” the bottom shield.
|symbol-capacitor-vpp-cap|
The capacitors are fixed-size elements and must be used as-is; they can be used in multiples.
.. include:: capacitors-vpp-table0.rst
This page intentionally left blank
.. |symbol-capacitor-vpp-cap_int3| image:: symbol-capacitor-vpp-cap_int3.svg
.. |symbol-capacitor-vpp-cap| image:: symbol-capacitor-vpp-cap.svg

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17
docs/rules/device-details/cells-sonos/cells-sonos-table0.rst Normal file
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.. list-table::
:header-rows: 1
:stub-columns: 1
* - MODEL CORNERS (\*.cor)
- Programmed
- Erased
* - Beginning of Life
- sonos\_bol\_p
- sonos\_bol\_e
* - End of Life
- sonos\_eol\_p
- sonos\_eol\_e

45
docs/rules/device-details/cells-sonos/cells-sonos-table1.rst Normal file
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.. list-table::
:header-rows: 1
:stub-columns: 1
* - Condition
- V\ :sub:`G`
- V\ :sub:`D`
- V\ :sub:`B`
- V\ :sub:`S`
- V\ :sub:`WL`
- Pulse
* - Read
- 0
- +1.1
- 0
- 0
- +1.8
- n/a
* - Program
- +6.7
- -3.8
- -3.8
- -38
- Float
- 2 ms
* - Erase
- -3.8
- +6.7
- +6.7
- +6.7
- Float
- 6 ms
* - VT meas
- I\ :sub:`D` = 2.05µA
- +1.1
- 0
- 0
- +1.8
- n/a

188
docs/rules/device-details/cells-sonos/cells-sonos-table2.rst Normal file
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.. list-table::
:header-rows: 1
:stub-columns: 1
* - Parameter
- W/L
- NOM
- LSL
- USL
- Units
- Description
* - IDSE4522C
- 0.45/0.22
- 85
- 27
- 144
- µA
- SONOS erased current at Vwl=5.0
* - IDSE4522RC
- 0.45/0.22
- 46
- 20
- 72
- µA
- SONOS erased current at Vwl=1.8
* - IDSP4522RC
- 0.45/0.22
- 0.003
- 0
- 2
- nA
- SONOS programmed current at Vwl=1.8
* - IDSP4522RC\_SP
- 0.45/0.22
- 0.003
- 0
- 0.074
- nA
- SONOS programmed current with Smart Program
* - IDSP14522RC
- 0.45/0.22
- 28
- 10
- 61.4
- µA
- SONOS program inhibit current, Vwl=1.8
* - IDSPI4522C\_SP
- 0.45/0.22
- 37
- 15.3
- 83.6
- µA
- SONOS program inhibit current, Vwl=5.0
* - VTE4522C
- 0.45/0.22
- -2.3
- -3.648
- -0.952
- V
- SONOS erased VT (VG@2.05uA)
* - VTP4522C
- 0.45/0.22
- 1.44
- 0.672
- 2.472
- V
- SONOS programmed VT (VG@2.05uA)
* - VTP4522C\_SP
- 0.45/0.22
- 1.44
- 1.172
- 1.972
- V
- SONOS programmed VT with Smart Program
* - VTPI4522C
- 0.45/0.22
- -1.132
- -2.055
- -0.512
- V
- SONOS program inhibit VT (VG@2.05uA)
* - VTPI4522C\_SP
- 0.45/0.22
- -1.132
- -2.055
- -0.512
- V
- SONOS program inhibit VT, Smart Program
* - IDSE3515C
- 0.35/0.15
- 0.0518
- 0.0162
- 0.103
- mA
- SONOS erased current at Vwl=5.0
* - IDSE3515RC
- 0.35/0.15
- 0.03
- 0.0128
- 0.049
- mA
- SONOS erased current at Vwl=1.8
* - IDSP3515RC
- 0.35/0.15
- 0.015
- 0
- 32
- nA
- SONOS programmed current at Vwl=1.8
* - IDSP3515RC\_SP
- 0.35/0.15
- 0.015
- 0.001
- 0.172
- nA
- SONOS programmed current with Smart Program
* - IDSP13515RC
- 0.35/0.15
- 0.032
- 0.0089
- 0.0602
- mA
- SONOS program inhibit current, Vwl=1.8
* - IDSPI3515C\_SP
- 0.35/0.15
- 0.032
- 0.0153
- 0.0551
- mA
- SONOS program inhibit current, Vwl=5.0
* - VTE3515C
- 0.35/0.15
- -1.91
- -3.26
- -0.71
- V
- SONOS erased VT (VG@2.05uA)
* - VTP3515C
- 0.35/0.15
- 1.44
- 0.49
- 2.472
- V
- SONOS programmed VT (VG@2.05uA)
* - VTP3515C\_SP
- 0.35/0.15
- 1.44
- 1.172
- 1.972
- V
- SONOS programmed VT with Smart Program
* - VTPI3515C
- 0.35/0.15
- -1.235
- -2.158
- -0.415
- V
- SONOS program inhibit VT (VG@2.05uA)
* - VTPI3515C\_SP
- 0.35/0.15
- -1.235
- -1.965
- -0.675
- V
- SONOS program inhibit VT, Smart Program

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SONOS cells
-----------
The SKY130 process currently supports two SONOS flash memory cells:
- The original cell is supported in the S8PFHD, S8PHRC and S8PFN-20 technology options, with operating temperatures from -55°C to +155°C
- The “star” cell is supported in the S8PHIRS technology option. Its cell size is approximately 25% smaller than the original cell, but its temperature range is restricted to -40°C to +125°C.
Spice models for the memory cells exist for multiple conditions:
.. include:: cells-sonos-table0.rst
Program and Erase characteristics are described in more detail in the ***S8 Nonvolatile Technology Spec*** (001-08712), and summarized below:
.. include:: cells-sonos-table1.rst
Endurance behavior is illustrated below (100K cycles guaranteed):
|sonos-erase-program|
Data retention behavior is shown below at 85C\ |sonos-data-retention|
E-test parameters are summarized below for both original and star cells:
.. include:: cells-sonos-table2.rst
The schematic for the 2-T SONOS memory cell is shown below:
|schematic-sonos-cell|
The cross-section of the 2-T SONOS cell is shown below.
|cross-section-sonos-cell|
.. |sonos-erase-program| image:: sonos-erase-program.svg
.. |sonos-data-retention| image:: sonos-data-retention.svg
.. |schematic-sonos-cell| image:: schematic-sonos-cell.svg
.. |cross-section-sonos-cell| image:: cross-section-sonos-cell.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Parameter
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXNPAS
- 0.14/0.15
- V
- 0.68
- 0.52
- 0.846
- 0.846
- 0.515
- 0.669
- 0.498
- 0.839
* - IDSNPAS
- 0.14/0.15
- µA
- 0.0702
- 0.0948
- 0.0471
- 0.0943
- 0.0473
- 68.2
- 45.5
- 90.8
* - ILKNPAS
- 0.14/0.15
- LOG A
- Max = -8.0
- -9.73
- -12.33
- -9.1
-
-
-
-

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Parameter
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXNLTC
- 0.21/0.15
- V
- 0.715
- 0.574
- 0.856
- 0.856
- 0.575
- 0.709
- 0.567
- 0.851
* - IDSNLTC
- 0.21/0.15
- µA
- 0.091
- 0.1197
- 0.0616
- 0.1192
- 0.0618
- 87.9
- 60.2
- 115.5
* - ILKNLTC
- 0.21/0.15
- LOG A
- Max = -7.8
- -9.45
- -11.65
- -8.90
-
-
-
-

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Parameter
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXPLTC
- 0.14/0.15
- V
- -0.918
- -0.761
- -1.085
- -0.747
- -1.089
- -0.905
- -1.080
- -0.732
* - IDSPLTC
- 0.14/0.15
- µA
- 0.0208
- 0.0306
- 0.0113
- 0.0304
- 0.0113
- 19.9
- 10.7
- 29.1
* - ILKPLTC
- 0.14/0.15
- LOG A
- Max = -7.3
- -9.860
- -13.31
- -8.880
-
-
-
-

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SRAM cells
----------
The SKY130 process currently supports only single-port SRAM’s, which are contained in hard-IP libraries. These cells are constructed with smaller design rules (Table 9), along with OPC (optical proximity correction) techniques, to achieve small memory cells. Use of the memory cells or their devices outside the specific IP is prohibited. The schematic for the SRAM is shown below in Figure 10. This cell is available in the S8 IP offerings and is monitored at e-test through the use of “pinned out” devices within the specific arrays.
|figure-10-schematics-of-the-single-port-sram|
**Figure 10. Schematics of the Single Port SRAM.**
A Dual-Port SRAM is currently being designed using a similar approach. Compilers for the SP and DP SRAM’s will be available end-2019.
Operating Voltages where SPICE models are valid
- V\ :sub:`DS` = 0 to 1.8V
- V\ :sub:`GS` = 0 to 1.8V
- V\ :sub:`BS` = 0 to -1.8V
Details
~~~~~~~
N-pass FET (SRAM)
^^^^^^^^^^^^^^^^^
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfet`
- Model Name (SRAM): :model:`sky130_fd_pr_base__npass.1`
.. include:: cells-sram-table0.rst
N-latch FET (SRAM)
^^^^^^^^^^^^^^^^^^
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfet`
- Model Name (SRAM): :model:`sky130_fd_pr_base__npd.1`
.. include:: cells-sram-table1.rst
P-latch FET (SRAM)
^^^^^^^^^^^^^^^^^^
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__pfet`
- Model Name (SRAM): :model:`sky130_fd_pr_base__ppu.1`
.. include:: cells-sram-table2.rst
.. |figure-10-schematics-of-the-single-port-sram| image:: figure-10-schematics-of-the-single-port-sram.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Parameter
- NOM
- LSL
- USL
- Units
- Description
* - BVN
- 11.7
- 10.7
- 14.0
- V
- N+ breakdown voltage
* - BVNH
- 12.7
- 11.7
- 14.0
- V
- HV N+ breakdown voltage
* - BVNE
- 11
- 9.5
- 14.5
- V
- N+ peripheral breakdown voltage
* - BVNEH
- 12.2
- 11.5
- 14.5
- V
- HV N+ peripheral breakdown voltage
* - BVP
- 12.2
- 10.2
- 14.5
- V
- P+ breakdown voltage
* - BVPH
- 12
- 11.2
- 14.5
- V
- HV P+ breakdown voltage
* - BVPE
- 10.5
- 9
- 14.5
- V
- P+ peripheral breakdown voltage
* - BVPEH
- 11.6
- 11.2
- 14.5
- V
- HV P+ peripheral breakdown voltage

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Diodes
------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__diode`
- Model Names: :model:`sky130_fd_pr_base__ndiode`, :model:`sky130_fd_pr_base__ndiode_h`, :model:`sky130_fd_pr_base__ndiode_native`, :model:`sky130_fd_pr_base__ndiode_lvt`, :model:`sky130_fd_pr_base__pdiode`, :model:`sky130_fd_pr_base__pdiode_h`, :model:`sky130_fd_pr_base__pdiode_hvt`, :model:`sky130_fd_pr_base__pdiode_lvt`, :model:`sky130_fd_pr_base__xnwdiode_rf`, :model:`sky130_fd_pr_base__xdnwdiode_pwell_rf`, :model:`sky130_fd_pr_base__dnwdiode_pw`, :model:`sky130_fd_pr_base__dnwdiode_psub`, :model:`sky130_fd_pr_base__dnwdiode_psub_victim`, :model:`sky130_fd_pr_base__dnwdiode_psub_aggressor`, :model:`sky130_fd_pr_base__nwdiode`, :model:`sky130_fd_pr_base__nwdiode_victim`, :model:`sky130_fd_pr_base__nwdiode_aggressor`, :model:`sky130_fd_pr_base__xesd_ndiode_h_X`, :model:`sky130_fd_pr_base__xesd_ndiode_h_dnwl_X`, :model:`sky130_fd_pr_base__xesd_pdiode_h_X (X = 100 or 200 or 300)`
- Cell Name: :cell:`sky130_fd_pr_base__lvsdiode`
- Model Names: :model:`sky130_fd_pr_base__ndiode`, :model:`sky130_fd_pr_base__ndiode_h`, :model:`sky130_fd_pr_base__pdiode`, :model:`sky130_fd_pr_base__pdiode_h`, :model:`sky130_fd_pr_base__dnwdiode_psub`, :model:`sky130_fd_pr_base__dnwdiode_psub_victim`, :model:`sky130_fd_pr_base__dnwdiode_psub_aggressor`, :model:`sky130_fd_pr_base__nwdiode_victim`, :model:`sky130_fd_pr_base__nwdiode_aggressor`, :model:`sky130_fd_pr_base__xesd_ndiode_h_X`, :model:`sky130_fd_pr_base__xesd_ndiode_h_dnwl_X`, :model:`sky130_fd_pr_base__xesd_pdiode_h_X (X = 100 or 200 or 300)`
Operating regime where SPICE models are valid
- \|V\ :sub:`d0` – V\ :sub:`d1`\ \| = 0 to 5.0V
Details
~~~~~~~
.. include:: diodes-table0.rst
Symbols for the diodes are shown below
|symbol-diode-01|\ |symbol-diode-02|\ |symbol-diode-03|\ |symbol-diode-04|
|symbol-diode-05| |symbol-diode-06| |symbol-diode-07| |symbol-diode-08|
|symbol-diode-09| |symbol-diode-10| |symbol-diode-11|
|symbol-diode-12| |symbol-diode-13|
|symbol-diode-14| |symbol-diode-15|
|symbol-diode-16| |symbol-diode-17|
.. |symbol-diode-01| image:: symbol-diode-01.svg
.. |symbol-diode-02| image:: symbol-diode-02.svg
.. |symbol-diode-03| image:: symbol-diode-03.svg
.. |symbol-diode-04| image:: symbol-diode-04.svg
.. |symbol-diode-05| image:: symbol-diode-05.svg
.. |symbol-diode-06| image:: symbol-diode-06.svg
.. |symbol-diode-07| image:: symbol-diode-07.svg
.. |symbol-diode-08| image:: symbol-diode-08.svg
.. |symbol-diode-09| image:: symbol-diode-09.svg
.. |symbol-diode-10| image:: symbol-diode-10.svg
.. |symbol-diode-11| image:: symbol-diode-11.svg
.. |symbol-diode-12| image:: symbol-diode-12.svg
.. |symbol-diode-13| image:: symbol-diode-13.svg
.. |symbol-diode-14| image:: symbol-diode-14.svg
.. |symbol-diode-15| image:: symbol-diode-15.svg
.. |symbol-diode-16| image:: symbol-diode-16.svg
.. |symbol-diode-17| image:: symbol-diode-17.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Parameter
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXNVHV20P00P7D
- 20/0.7
- V
- 0.743
- 0.616
- 0.87
- 0.924
- 0.562
- 0.7423
- 0.5612
- 0.9234
* - VTXNVHV20P02P2D
- 20/2.2
- V
- 0.767
- 0.661
- 0.874
- 0.919
- 0.615
- 0.7668
- 0.6150
- 0.9191
* - IDSNVHV20P00P7D
- 20/0.7
- mA
- 9.012
- 11.337
- 6.68
- 11.542
- 6.477
- 8.969
- 6.430
- 11.51
* - IDSNVHV20P02P2D
- 20/2.2
- mA
- 4.444
- 5.56
- 3.329
- 5.657
- 3.232
- 4.440
- 3.232
- 5.656
* - RDSNVHV20P00P7D
- 20/0.7
- Ω
- 457.3
- 266.1
- 819.4
- 826.4
- 269.6
- 458.5
- 270.3
- 828.2
* - RDSNVHV20P02P2D
- 20/2.2
- Ω
- 702.8
- 499.7
- 1087.8
- 1097.7
- 498.7
- 703.8
- 499.3
- 1099.0
* - ILKNVHV20P00P7D
- 20/0.7
- LOG A
- Max = -9.01
- -11.35
- -18
- -9.05
-
-
-
-
* - ILKNVHV20P00P7D
- 20/2.2
- LOG A
- Max = -9.44
- -11.50
- -18
- -9.50
-
-
-
-

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11V/16V NMOS FET
----------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfetexd`
- Model Name: :model:`sky130_fd_pr_base__nvhv`
Operating Voltages where SPICE models are valid, subject to SOA limitations:
- V\ :sub:`DS` = 0 to +16V (V:sub:`GS` = 0)
- V\ :sub:`DS` = 0 to +11V (V:sub:`GS` > 0)
- V\ :sub:`GS` = 0 to 5.5V
- V\ :sub:`BS` = 0 to -2.0V
Details
~~~~~~~
Major model output parameters are shown below and compared against the EDR (e-test) specs
.. include:: fet-nmos-11v-16v-table0.rst
The symbol of the :model:`sky130_fd_pr_base__nvhv` (11V/16V NMOS FET) is shown below:
|symbol-11v-16v-nmos-fet|
The cross-section of the 11V/16VV NMOS FET is shown below.
|cross-section-11v-16v-nmos-fet|
.. |symbol-11v-16v-nmos-fet| image:: symbol-11v-16v-nmos-fet.svg
.. |cross-section-11v-16v-nmos-fet| image:: cross-section-11v-16v-nmos-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Parameter
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXNLL
- 7/8
- V
- 0.434
- 0.417
- 0.452
- 0.459
- 0.410
- 0.440
- 0.415
- 0.465
* - VTXNN42L
- 0.42/1
- V
- 0.485
- 0.453
- 0.516
- 0.530
- 0.440
- 0.485
- 0.440
- 0.530
* - VTXNS15L
- 7/0.15
- V
- 0.611
- 0.573
- 0.65
- 0.666
- 0.556
- 0.611
- 0.556
- 0.666
* - VTXNSN15L
- 0.42/0.15
- V
- 0.640
- 0.562
- 0.717
- 0.750
- 0.529
- 0.640
- 0.529
- 0.750
* - IDSNS15L
- 7/0.15
- mA
- 4.010
- 4.453
- 3.567
- 3.529
- 4.491
- 4.008
- 3.527
- 4.489
* - ILKN15L
- 7/0.15
- LOG A
- Max = -9.53
- -10.73
- -18
- -9.54
-
-
-
-

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Parameter
- Stages
- Units
- MODEL
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- NOM
- MIN
- MAX
* - FO = 1
- 143
- ps
-
-
-
- 28.61
- 21.96
- 39.15

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1.8V low-VT NMOS FET
--------------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfet`
- Model Name: :model:`sky130_fd_pr_base__nlowvt`
Operating Voltages where SPICE models are valid
- V\ :sub:`DS` = 0 to 1.95V
- V\ :sub:`GS` = 0 to 1.95V
- V\ :sub:`BS` = +0.3 to -1.95V
Details
~~~~~~~
Major model output parameters are shown below and compared against the EDR (e-test) specs.
.. include:: fet-nmos-1v8-low-vt-table0.rst
Inverter Gate Delays using :model:`sky130_fd_pr_base__nlowvt`/pshort device combinations:
.. include:: fet-nmos-1v8-low-vt-table1.rst
The symbol of the :model:`sky130_fd_pr_base__nlowvt` (1.8V low-VT NMOS FET) is shown below:
|symbol-1v8-low-vt-nmos-fet|
The cross-section of the low-VT NMOS FET is shown below. The cross-section is identical to the std NMOS FET except for the V\ :sub:`T` adjust implants (to achieve the lower V\ :sub:`T`)
|cross-section-1v8-low-vt-nmos-fet|
.. |symbol-1v8-low-vt-nmos-fet| image:: symbol-1v8-low-vt-nmos-fet.svg
.. |cross-section-1v8-low-vt-nmos-fet| image:: cross-section-1v8-low-vt-nmos-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Parameter
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXNL
- 7/8
- V
- 0.538
- 0.520
- 0.557
- 0.513
- 0.564
- 0.541
- 0.515
- 0.567
* - VTXNN42
- 0.42/1
- V
- 0.550
- 0.522
- 0.578
- 0.510
- 0.590
- 0.550
- 0.510
- 0.590
* - VTXNS15
- 7/0.15
- V
- 0.645
- 0.615
- 0.677
- 0.603
- 0.689
- 0.700
- 0.661
- 0.739
* - VTSNSN15
- 0.42/0.15
- V
- 0.738
- 0.659
- 0.818
- 0.625
- 0.852
- 0.738
- 0.625
- 0.852
* - IDSNS15
- 7/0.15
- mA
- 3.512
- 3.945
- 3.078
- 3.041
- 3.983
- 3.510
- 3.039
- 3.981
* - ILKN15
- 7/0.15
- LOG A
- Max = -10.25
- -11.31
- -18
- -10.69
-
-
-
-

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1.8V NMOS FET
-------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfet`
- Model Name: :model:`sky130_fd_pr_base__nshort`
Operating Voltages where SPICE models are valid
- V\ :sub:`DS` = 0 to 1.95V
- V\ :sub:`GS` = 0 to 1.95V
- V\ :sub:`BS` = +0.3 to -1.95V
Details
~~~~~~~
Major model output parameters are shown below and compared against the EDR (e-test) specs.
.. include:: fet-nmos-1v8-table0.rst
The symbol of the :model:`sky130_fd_pr_base__nshort` (1.8V NMOS FET) is shown below:
|symbol-1v8-nmos-fet|
The cross-section of the NMOS FET is shown below:
|cross-section-1v8-nmos-fet|
The device shows the p-well inside of a deep n-well, but it can be made either with or without the DNW under the p-well
.. |symbol-1v8-nmos-fet| image:: symbol-1v8-nmos-fet.svg
.. |cross-section-1v8-nmos-fet| image:: cross-section-1v8-nmos-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Param
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXN20VHVISO1
- 2\* 30/1.0
- V
- 0.817
- 0.637
- 0.998
- 0.998
- 0.637
- 0.8171
- 0.6372
- 0.9981
* - VTBN20VHVISO1
- 2\* 30/1.0
- V
- 1.817
- 1.567
- 2.069
- 2.069
- 1.567
- 1.817
- 1.567
- 2.069
* - BVN20VHVISO1
- 2\* 30/1.0
- V
-
-
-
-
-
- 29.78
- 26
- 40
* - IBB20N20VHVISO1
- 2\* 30/1.0
- µA/µm
-
-
-
-
-
- 1.152
- 0
- 2
* - ID5N20VHVISO1
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- mA
- 1.506
- 2.550
- 0.806
- 0.806
- 2.550
- 1.498
- 0.8033
- 2.526
* - IDLN20VHVISO1
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- mA
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- 0.578
- 0.174
- 0.174
- 0.578
- 0.3334
- 0.1732
- 0.5718
* - IDSN20VHVISO1
- 2\* 30/1.0
- mA
- 15.33
- 19.34
- 11.32
- 11.32
- 19.34
- 15.32
- 11.32
- 19.32
* - RDSP20VHVISO1
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- Ω
- 333.7
- 197.9
- 622.4
- 622.4
- 197.9
- 333.7
- 197.9
- 622.4
* - RSPOP20VHVISO1
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- mΩ-mm\ :sup:`2`
- 100.5
- 59.6
- 187.5
- 187.5
- 59.6
- 79.38
- 47.63
- 111.1
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20V isolated NMOS FET
---------------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfetexd`
- Model Name: :model:`sky130_fd_pr_base__n20vhviso1`
Operating Voltages where SPICE models are valid, subject to SOA limitations:
- V\ :sub:`DS` = 0 to +22V
- V\ :sub:`GS` = 0 to 5.5V
- V\ :sub:`BS` = 0 to -2.0V
Details
~~~~~~~
The 20V isolated NMOS FET has the same construction as the 20V NMOS FET, but is built over a Deep N-well. This permits the p-well to be isolated from the substrate and permit “high-side” usage (where the PW body is held above ground).
Major model output parameters are shown below and compared against the EDR (e-test) specs
.. include:: fet-nmos-20v-isolated-table0.rst
The symbol of the :model:`sky130_fd_pr_base__n20vhviso1` (20V isolated NMOS FET) is shown below.
|symbol-20v-isolated-nmos-fet|
The cross-section of the 20V isolated NMOS FET is shown below.
|cross-section-20v-isolated-nmos-fet|
.. |symbol-20v-isolated-nmos-fet| image:: symbol-20v-isolated-nmos-fet.svg
.. |cross-section-20v-isolated-nmos-fet| image:: cross-section-20v-isolated-nmos-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Param
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXN20VHV1L
- 2\* 30/1.0
- V
- 0.246
- 0.068
- 0.428
- 0.428
- 0.068
- 0.246
- 0.0676
- 0.4276
* - VTBN20VHV1L
- 2\* 30/1.0
- V
- 0.722
- 0.529
- 0.962
- 0.962
- 0.529
- 0.6321
- 0.436
- 0.8534
* - BVN20VHV1L
- 2\* 30/1.0
- V
-
-
-
-
-
- 58.19
- 40
- 80
* - IBB20N20VHV1L
- 2\* 30/1.0
- µA/µm
-
-
-
-
-
- 0.3764
- 0
- 0.6
* - ID5N20VHV1L
- 2\* 30/1.0
- mA
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- 2.197
- 1.086
- 1.086
- 2.197
- 1.612
- 1.082
- 2.18
* - IDLN20VHV1L
- 2\* 30/1.0
- mA
- 0.366
- 0.492
- 0.247
- 0.247
- 0.492
- 0.3638
- 0.246
- 0.4872
* - IDSN20VHV1L
- 2\* 30/1.0
- mA
- 14.44
- 18.8
- 10.1
- 10.1
- 18.8
- 14.44
- 10.1
- 18.8
* - RDSP20VHV1L
- 2\* 30/1.0
- Ω
- 310.2
- 229.3
- 462.0
- 462.0
- 229.3
- 310.2
- 229.4
- 462
* - RSPOP20VHV1L
- 2\* 30/1.0
- mΩ-mm\ :sup:`2`
- 93.4
- 69.1
- 139.1
- 139.1
- 69.1
- 89.63
- 69.01
- 128.2
* - ILKN20VHV1L
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- LOG A
- Max = -5.6
- -7.463
- -9.403
- -5.607
-
-
-
-

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20V native NMOS FET
-------------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfetexd`
- Model Name: :model:`sky130_fd_pr_base__n20nativevhv1`
Operating Voltages where SPICE models are valid, subject to SOA limitations:
- V\ :sub:`DS` = 0 to +22V
- V\ :sub:`GS` = 0 to 5.5V
- V\ :sub:`BS` = 0 to -2.0V
Details
~~~~~~~
The 20V native NMOS FET is similar to the 20V isolated NMOS FET, but has all Vt implants blocked to achieve a very low VT.
Major model output parameters are shown below and compared against the EDR (e-test) specs
.. include:: fet-nmos-20v-native-table0.rst
The symbol of the :model:`sky130_fd_pr_base__n20nativevhv1` (20V native NMOS FET) shown below.
|symbol-20v-native-nmos-fet|
The cross-section of the 20V native NMOS FET is shown below.
|cross-section-20v-native-nmos-fet|
.. |symbol-20v-native-nmos-fet| image:: symbol-20v-native-nmos-fet.svg
.. |cross-section-20v-native-nmos-fet| image:: cross-section-20v-native-nmos-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Param
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXNZVT1
- 2\* 30/5.5
- V
- -0.03
- -0.025
- -0.024
- -0.024
- -0.025
- -0.1224
- -0.0228
- -0.2228
* - VTBNZVT1
- 2\* 30/5.5
- V
- -0.050
- -0.061
- 0.095
- 0.095
- -0.061
- -0.0496
- 0.095
- -0.1611
* - BVNZVT1
- 2\* 30/5.5
- V
-
-
-
-
-
- 48
- 30
- 80
* - IBBNZVT1
- 2\* 30/5.5
- µA/µm
-
-
-
-
-
- 0.033
- 0
- 0.1
* - ID5N0ZVT1
- 2\* 30/5.5
- mA
- 0.0279
- 0.1698
- 0.0035
- 0.0035
- 0.1698
- 0.0279
- 0.00354
- 0.1695
* - ID5NZVT1
- 2\* 30/5.5
- mA
- 1.376
- 1.854
- 0.850
- 0.850
- 1.854
- 1.368
- 0.8477
- 1.84
* - IDLN0ZVT1
- 2\* 30/5.5
- mA
- 0.0134
- 0.0689
- 0.0020
- 0.0020
- 0.0689
- 0.0134
- 0.00202
- 0.0688
* - IDLNZVT1
- 2\* 30/5.5
- mA
- 0.284
- 0.381
- 0.181
- 0.181
- 0.381
- 0.282
- 0.18
- 0.3777
* - IDSN0ZVT1
- 2\* 30/5.5
- mA
- 0.0336
- 0.2108
- 0.0044
- 0.0044
- 0.2108
- 0.0336
- 0.00447
- 0.2104
* - IDSNZVT1
- 2\* 30/5.5
- mA
- 12.85
- 17.50
- 8.35
- 8.35
- 17.50
- 12.79
- 8.366
- 17.38
* - RDSNZVT1
- 2\* 30/5.5
- Ω
- 365.2
- 271.7
- 589.8
- 589.8
- 271.7
- 365.5
- 271.7
- 589.8
* - RSPONZVT1
- 2\* 30/5.5
- mΩ-mm\ :sup:`2`
- 186.7
- 138.9
- 301.5
- 301.5
- 138.9
- 186.8
- 138.9
- 301.5
* - IOFFNZVT1
- 2\* 30/5.5
- LOG A
- Max = -9.5
- -11.57
- -15
- -9.706
-
-
-
-

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20V NMOS zero-VT FET
--------------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfetexd`
- Model Name: :model:`sky130_fd_pr_base__n20zvtvhv1`
Operating Voltages where SPICE models are valid, subject to SOA limitations:
- V\ :sub:`DS` = 0 to +22V
- V\ :sub:`GS` = 0 to 5.5V
- V\ :sub:`BS` = 0 to -2.0V
Details
~~~~~~~
The 20V NMOS zero-VT FET has p-well and all Vt implants blocked to achieve a zero VT.
Major model output parameters are shown below and compared against the EDR (e-test) specs
.. include:: fet-nmos-20v-zero-vt-table0.rst
The symbol of the :model:`sky130_fd_pr_base__n20zvtvhv1` (20V NMOS zero-VT FET) is still under development.
The cross-section of the 20V NMOS zero-VT FET is shown below.
|cross-section-20v-nmos-zero-vt-fet|
.. |cross-section-20v-nmos-zero-vt-fet| image:: cross-section-20v-nmos-zero-vt-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Param
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXN20VHV1
- 2\* 30/1.0
- V
- 0.823
- 0.643
- 1.004
- 1.004
- 0.643
- 0.8231
- 0.6432
- 1.004
* - VTBN20VHV1
- 2\* 30/1.0
- V
- 1.823
- 1.573
- 2.075
- 2.075
- 1.573
- 1.823
- 1.573
- 2.075
* - BVN20VHV1
- 2\* 30/1.0
- V
-
-
-
-
-
- 65.96
- 40
- 80
* - IBB20N20VHV1
- 2\* 30/1.0
- µA/µm
-
-
-
-
-
- 0.1623
- 0
- 0.6
* - ID5N20VHV1
- 2\* 30/1.0
- mA
- 1.537
- 2.579
- 0.892
- 0.892
- 2.579
- 1.528
- 0.8892
- 2.556
* - IDLN20VHV1
- 2\* 30/1.0
- mA
- 0.335
- 0.577
- 0.191
- 0.191
- 0.577
- 0.3326
- 0.1903
- 0.5709
* - IDSN20VHV1
- 2\* 30/1.0
- mA
- 13.35
- 17.34
- 9.34
- 9.34
- 17.34
- 13.34
- 9.335
- 17.34
* - RDSN20VHV1
- 2\* 30/1.0
- Ω
- 327.2
- 195.6
- 562.3
- 562.3
- 195.6
- 327.2
- 195.6
- 562.3
* - RSPON20VHV1
- 2\* 30/1.0
- mΩ-mm2
- 98.6
- 58.9
- 169.4
- 169.4
- 58.9
- 98.49
- 59.1
- 137.9
* - ILKN20VHV1
- 2\* 30/1.0
- LOG A
- Max = -8.6
- -11.63
- -18
- -8.162
-
-
-
-

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20V NMOS FET
------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfetexd`
- Model Name: :model:`sky130_fd_pr_base__n20vhv1`
Operating Voltages where SPICE models are valid, subject to SOA limitations:
- V\ :sub:`DS` = 0 to +22V
- V\ :sub:`GS` = 0 to 5.5V
- V\ :sub:`BS` = 0 to -2.0V
Details
~~~~~~~
The 20V NMOS FET has similar construction to the 11V/16V NMOS FET, with several differences:
- Longer drift region
- Longer poly gate
- Larger W/L
- Devices placed in pairs (drain in center, sources on outside)
Major model output parameters are shown below and compared against the EDR (e-test) specs
.. include:: fet-nmos-20v-table0.rst
The symbol of the :model:`sky130_fd_pr_base__n20vhv1` (20V NMOS FET) is shown below.
|symbol-20v-nmos-fet|
The cross-section of the 20V NMOS FET is shown below.
|cross-section-20v-nmos-fet|
.. |symbol-20v-nmos-fet| image:: symbol-20v-nmos-fet.svg
.. |cross-section-20v-nmos-fet| image:: cross-section-20v-nmos-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Param
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXNLNVH
- 10/4.0
- V
- 0.121
- 0.091
- 0.151
- 0.164
- 0.079
- 0.121
- 0.079
- 0.164
* - VTXNS90NVH
- 10/0.9
- V
- 5.855
- 6.098
- 5.605
- 6.107
- 5.592
- 0.097
- 0.044
- 0.150
* - VTXNSN90NVH
- 0.42/0.9
- V
- 0.075
- 0.017
- 0.129
- 0.152
- -0.014
- 0.075
- -0.002
- 0.152
* - IDSNS90NTH
- 10/0.9
- mA
- 0.097
- 0.06
- 0.134
- 0.15
- 0.044
- 5.819
- 5.558
- 6.069
* - ILKN90NVH
- 10/0.9
- LOG A
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- -6.5
- -18
- -5.6
-
-
-
-
* - VTXNS50NTH
- 10/0.5
- V
- -0.029
- 0.029
- 0.013
- 0.031
- 0.011
- -0.029
- -0.089
- 0.031
* - VTXNSN50NTH
- 0.42/0.5
- V
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- 0.013
- 0.02
- 0.043
- -0.009
- -0.046
- -0.142
- 0.050
* - IDSNS50NTH
- 10/0.5
- mA
- 4.858
- 5.294
- 4.423
- 5.331
- 4.386
- 4.823
- 4.357
- 5.291
* - ILKN50NVH
- 10/0.5
- LOG A
- Max = -3.6
- -4.03
- -18
- -3.67
-
-
-
-

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3.0V and 5.0V native NMOS FET
-----------------------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfet`
- Model Name: :model:`sky130_fd_pr_base__ntvnative`, :model:`sky130_fd_pr_base__nhvnative`
Operating Voltages where SPICE models are valid for :model:`sky130_fd_pr_base__ntvnative`
- V\ :sub:`DS` = 0 to 3.3V
- V\ :sub:`GS` = 0 to 3.3V
- V\ :sub:`BS` = 0 to -3.3V
Details
~~~~~~~
Operating Voltages where SPICE models are valid for :model:`sky130_fd_pr_base__nhvnative`
- V\ :sub:`DS` = 0 to 5.5V
- V\ :sub:`GS` = 0 to 5.5V
- V\ :sub:`BS` = +0.3 to -5.5V
Details
~~~~~~~
The native device is constructed by blocking out all VT implants.
The model and EDR (e-test) parameters are compared below. Note that the minimum gate length for 3V operation is 0.5 µm, whereas the 5V device has minimum gate length of 0.9 µm.
.. include:: fet-nmos-3v0-and-5v0-native-table0.rst
The symbols for the :model:`sky130_fd_pr_base__ntvnative` and :model:`sky130_fd_pr_base__nhvnative` devices are shown below.
|symbol-3v0-and-5v0-native-nmos-fet-ntvnative| |symbol-3v0-and-5v0-native-nmos-fet-nhvnative|
The cross-section of the native devices is shown below. Note that the only differences between the nvtnative and :model:`sky130_fd_pr_base__nhvnative` devices are the minimum gate length and the VDS requirements.
|cross-section-3v0-and-5v0-native-nmos-fet|
.. |symbol-3v0-and-5v0-native-nmos-fet-ntvnative| image:: symbol-3v0-and-5v0-native-nmos-fet-ntvnative.svg
.. |symbol-3v0-and-5v0-native-nmos-fet-nhvnative| image:: symbol-3v0-and-5v0-native-nmos-fet-nhvnative.svg
.. |cross-section-3v0-and-5v0-native-nmos-fet| image:: cross-section-3v0-and-5v0-native-nmos-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Param
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - VTXNLH
- 7/8
- V
- 0.811
- 0.780
- 0.843
- 0.856
- 0.767
- 0.811
- 0.767
- 0.856
* - VTXNN42H
- 0.42/20
- V
- 0.813
- 0.764
- 0.862
- 0.883
- 0.743
- 0.813
- 0.743
- 0.883
* - VTXNS50H
- 7/0.50
- V
- 0.822
- 0.744
- 0.899
- 0.933
- 0.711
- 0.822
- 0.711
- 0.933
* - VTXNSN50H
- 0.42/0.50
- V
- 0.781
- 0.672
- 0.891
- 0.937
- 0.625
- 0.781
- 0.625
- 0.937
* - IDSNS50H
- 7/0.50
- mA
- 12.1
- 13.0
- 11.2
- 11.1
- 13.1
- 12.1
- 11.1
- 13.1
* - ILKN50H
- 7/0.50
- LOG A
- Max = -10.6
- -12.3
- -18
- -10.9
-
-
-
-

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5.0V/10.5V NMOS FET
-------------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfet`
- Model Name: :model:`sky130_fd_pr_base__nhv`
Operating Voltages where SPICE models are valid
- V\ :sub:`DS` = 0 to 11.0V
- V\ :sub:`GS` = 0 to 5.5V
- V\ :sub:`BS` = 0 to -5.5V
Details
~~~~~~~
Major model output parameters are shown below and compared against the EDR (e-test) specs
.. include:: fet-nmos-5v0-10v5-table0.rst
The symbols of the :model:`sky130_fd_pr_base__nhv` (5.0/10.5 V NMOS FET) is shown below:
|symbol-5v0-10v5-nmos-fet|
The cross-section of the 5.0/10.5 V NMOS FET is shown below.
|cross-section-5v0-10v5-nmos-fet|
.. |symbol-5v0-10v5-nmos-fet| image:: symbol-5v0-10v5-nmos-fet.svg
.. |cross-section-5v0-10v5-nmos-fet| image:: cross-section-5v0-10v5-nmos-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Param
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
* - IDSNESDHVS55
- 21.5/0.55
- mA
- 12.172
- 13.073
- 11.277
- 13.144
- 11.207
- 11.46
- 10.57
- 12.35
* - ILKNESDHVS55
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- -12.49
- -15
- -11.21
-
-
-
-
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- 0.817
- 0.776
- 0.858
- 0.876
- 0.758
- 0.812
- 0.752
- 0.871
* - IDSNESDLVS
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- mA
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- 11.027
- 8.877
- 11.055
- 8.84
- 8.145
- 7.216
- 9.075
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- -10.85
- -12.15
- -10.15
-
-
-
-
* - VTXNESDLVS
- 20.35/0.165
- V
- 0.669
- 0.621
- 0.715
- 0.737
- 0.599
- 0.6416
- 0.5706
- 0.7125

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NMOS ESD FET
------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__nfet`
- Model Name: :model:`sky130_fd_pr_base__nshortesd`, :model:`sky130_fd_pr_base__nhvesd`, :model:`sky130_fd_pr_base__nhvesdnative`
Operating Voltages where SPICE models are valid
- V\ :sub:`DS` = 0 to 11.0V (nhv\*), 0 to 1.95V (nshort\*)
- V\ :sub:`GS` = 0 to 5.0V (nhv\*), 0 to 1.95V (nshort\*)
- V\ :sub:`BS` = 0 to -5.5V, (nhv), +0.3 to -5.5V (nhvnative), 0 to -1.95V (nshort\*)
Details
~~~~~~~
The ESD FET’s differ from the regular NMOS devices in several aspects, most notably:
- Increased isolation spacing from contacts to surrounding STI
- Increased drain contact-to-gate spacing
- Placement of n-well under the drain contacts
Major model output parameters are shown below and compared against the EDR (e-test) specs
.. include:: fet-nmos-esd-table0.rst
The symbols of the :model:`sky130_fd_pr_base__nhvesd` and :model:`sky130_fd_pr_base__nhvesdnative` (ESD NMOS FET) are shown below:
|symbol-nmos-esd-fet-nhvesd| |symbol-nmos-esd-fet-nhvesdnative|
The cross-section of the ESD NMOS FET is shown below.
|cross-section-nmos-esd-fet|
.. |symbol-nmos-esd-fet-nhvesd| image:: symbol-nmos-esd-fet-nhvesd.svg
.. |symbol-nmos-esd-fet-nhvesdnative| image:: symbol-nmos-esd-fet-nhvesdnative.svg
.. |cross-section-nmos-esd-fet| image:: cross-section-nmos-esd-fet.svg

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.. list-table::
:header-rows: 2
:stub-columns: 1
* - Param
- W/L
- Units
- MODEL
-
-
-
-
- EDR
-
-
* -
-
-
- TT
- FF
- SS
- FS
- SF
- NOM
- MIN
- MAX
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- 20/0.66
- V
- -1.105
- -1.015
- -1.196
- -0.975
- -1.235
- -1.10
- -1.24
- -0.98
* - VTXPVHV20P02P20
- 20/2.2
- V
- -1.098
- -1.006
- -1.189
- -0.967
- -1.229
- -1.10
- -1.23
- -0.97
* - IDSPVHV20P00P66
- 20/0.66
- mA
- 4.912
- 6.258
- 3.593
- 6.393
- 3.505
- 4.911
- 3.505
- 6.393
* - IDSPVHV20P02P20
- 20/2.2
- mA
- 1.902
- 2.403
- 1.392
- 2.448
- 1.343
- 1.902
- 1.343
- 2.448
* - RDSPVHV20P00P66
- 20/0.66
- Ω
- 754.8
- 483.1
- 1269.0
- 1274.7
- 481.6
- 757.1
- 482.9
- 1279
* - RDSPVHV20P02P20
- 20/2.2
- Ω
- 1407
- 1021
- 2128
- 2163
- 1015
- 1409
- 1016
- 2167
* - ILKPVHV20P00P66
- 20/0.66
- LOG A
- Max = -9.66
- -13.20
- -14.55
- -9.77
-
-
-
-
* - ILKPVHV20P02P20
- 20/2.2
- LOG A
- Max = -10.07
- -13.20
- -14.41
- -10.42
-
-
-
-

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10V/16V PMOS FET
----------------
Spice Model Information
~~~~~~~~~~~~~~~~~~~~~~~
- Cell Name: :cell:`sky130_fd_pr_base__pfetexd`
- Model Name: :model:`sky130_fd_pr_base__pvhv`
Operating Voltages where SPICE models are valid, subject to SOA limitations:
- V\ :sub:`DS` = 0 to -16V (V:sub:`GS` = 0)
- V\ :sub:`DS` = 0 to -10V (V:sub:`GS` < 0)
- V\ :sub:`GS` = 0 to -5.5V
- V\ :sub:`BS` = 0 to +2.0V
Details
~~~~~~~
Major model output parameters are shown below and compared against the EDR (e-test) specs
.. include:: fet-pmos-10v-16v-table0.rst
The symbol of the :model:`sky130_fd_pr_base__pvhv` (10V/16V PMOS FET) is shown below:
|symbol-10v-16v-pmos-fet|
The cross-section of the 10V/16V PMOS FET is shown below.
|cross-section-10v-16v-pmos-fet|
.. |symbol-10v-16v-pmos-fet| image:: symbol-10v-16v-pmos-fet.svg
.. |cross-section-10v-16v-pmos-fet| image:: cross-section-10v-16v-pmos-fet.svg

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