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skywater-pdk
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infra: Escape strings starting with * 

Yaml treats strings starting with a `*` character as references to
previous mappings (defined with `&`). Hence any glob starting with *
needs to be wrapped in quotes.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
This commit is contained in:
Tim 'mithro' Ansell 2020-11-07 13:43:00 -08:00
parent 03d2b600f6
commit 3a3884b4c7
1 changed files with 23 additions and 23 deletions
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46
.github/labeler.yml vendored
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@ -1,5 +1,5 @@
documentation: documentation:
- *.rst - "*.rst"
- docs - docs
- docs/* - docs/*
- docs/**/* - docs/**/*
@ -8,51 +8,51 @@ files-definition:
- definition.json - definition.json
files-layout-gds: files-layout-gds:
- *.gds - "*.gds"
files-layout-lef-magic: files-layout-lef-magic:
- *.magic.lef - "*.magic.lef"
files-layout-lef: files-layout-lef:
- *.lef - "*.lef"
files-layout-tlef: files-layout-tlef:
- *.tlef - "*.tlef"
files-model-behavioral-verilog: files-model-behavioral-verilog:
- *.behavioral.v - "*.behavioral.v"
files-model-functional-verilog: files-model-functional-verilog:
- *.functional.v - "*.functional.v"
files-model-spice: files-model-spice:
- *.spice - "*.spice"
# files-model-verilog # files-model-verilog
files-netlist-cdl: files-netlist-cdl:
- *.cdl - "*.cdl"
files-netlist-tsv: files-netlist-tsv:
- *.netlist.tsv - "*.netlist.tsv"
files-powerpins: files-powerpins:
- *.pp.* - "*.pp.*"
files-schematic-svg: files-schematic-svg:
- *.schematic.svg - "*.schematic.svg"
files-symbol-svg: files-symbol-svg:
- *.symbol.svg - "*.symbol.svg"
files-symbol-verilog: files-symbol-verilog:
- *.symbol.v - "*.symbol.v"
files-timing-json: files-timing-json:
- *.lib.json - "*.lib.json"
# files-timing-liberty: # files-timing-liberty:
# - *.lib # - *.lib
files-testbench-verilog: files-testbench-verilog:
- *.tb.v - "*.tb.v"
infrastructure: infrastructure:
- .github/* - .github/*
- .github/**/* - .github/**/*
- *travis* - "*travis*"
- *kokoro* - "*kokoro*"
lib-sky130_ef_io: lib-sky130_ef_io:
- sky130_fd_ef_io - sky130_fd_ef_io
@ -89,17 +89,17 @@ lib-sky130_osu_sc:
# scripts-documentation # scripts-documentation
scripts-python: scripts-python:
- *.py - "*.py"
scripts-python-liberty: scripts-python-liberty:
- liberty.py - liberty.py
- corners.py - corners.py
scripts-python-verilog: scripts-python-verilog:
- skywater_pdk/verilog/* # Script itself - skywater_pdk/verilog/* # Script itself
- skywater_pdk/verilog/**/* # Script itself - skywater_pdk/verilog/**/* # Script itself
- *.blackbox.v # Generated blackbox files - "*.blackbox.v" # Generated blackbox files
- *.symbol.v # Generated symbol files - "*.symbol.v" # Generated symbol files
- *.tb.v # Generated test bench - "*.tb.v" # Generated test bench
- *_[0-9].v # Generated strength driver wrappers - "*_[0-9].v" # Generated strength driver wrappers
# tools-BAG # tools-BAG
# tools-Cadence-Innovus # tools-Cadence-Innovus