diff --git a/docs/contents/libraries/sky130_fd_sc_ms b/docs/contents/libraries/sky130_fd_sc_ms new file mode 120000 index 0000000..d754348 --- /dev/null +++ b/docs/contents/libraries/sky130_fd_sc_ms @@ -0,0 +1 @@ +../../../libraries/sky130_fd_sc_ms/latest \ No newline at end of file diff --git a/libraries/sky130_fd_sc_ms/latest b/libraries/sky130_fd_sc_ms/latest new file mode 120000 index 0000000..5eb312c --- /dev/null +++ b/libraries/sky130_fd_sc_ms/latest @@ -0,0 +1 @@ +v0.0.0 \ No newline at end of file diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/README.rst b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/README.rst new file mode 100644 index 0000000..bd52d32 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/README.rst @@ -0,0 +1,33 @@ + +:cell_name:`sky130_fd_sc_ms__xor3` +================================== + +.. list-table:: + :header-rows: 1 + :widths: 50 50 + + * - Without Power Pins + - With Power Pins + + * - + .. no-license:: sky130_fd_sc_ms__xor3.blackbox.v + :language: verilog + :linenos: + + - + .. no-license:: sky130_fd_sc_ms__xor3.pp.blackbox.v + :language: verilog + :linenos: + + * - + .. image:: sky130_fd_sc_ms__xor3.symbol.svg + - + .. image:: sky130_fd_sc_ms__xor3.pp.symbol.svg + + * - .. image:: sky130_fd_sc_ms__xor3.schematic.svg + - .. image:: sky130_fd_sc_ms__xor3.pp.schematic.svg + + * - .. image:: sky130_fd_sc_ms__xor3.schematic.svg + - .. image:: sky130_fd_sc_ms__xor3.pp.schematic.svg + + diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.behavioral.pp.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.behavioral.pp.v new file mode 100644 index 0000000..6b47ebb --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.behavioral.pp.v @@ -0,0 +1,72 @@ +/* + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 +*/ + + +`ifndef SKY130_FD_SC_MS__XOR3_BEHAVIORAL_PP_V +`define SKY130_FD_SC_MS__XOR3_BEHAVIORAL_PP_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog simulation functional model. + */ + +`timescale 1ns / 1ps +`default_nettype none + +// Import user defined primitives. +`include "../../models/udp_pwrgood_pp_pg/sky130_fd_sc_ms__udp_pwrgood_pp_pg.v" + +`celldefine +module sky130_fd_sc_ms__xor3 ( + X , + A , + B , + C , + VPWR, + VGND, + VPB , + VNB +); + + // Module ports + output X ; + input A ; + input B ; + input C ; + input VPWR; + input VGND; + input VPB ; + input VNB ; + + // Local signals + wire xor0_out_X ; + wire pwrgood_pp0_out_X; + + // Name Output Other arguments + xor xor0 (xor0_out_X , A, B, C ); + sky130_fd_sc_ms__udp_pwrgood_pp$PG pwrgood_pp0 (pwrgood_pp0_out_X, xor0_out_X, VPWR, VGND); + buf buf0 (X , pwrgood_pp0_out_X ); + +endmodule +`endcelldefine + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_BEHAVIORAL_PP_V \ No newline at end of file diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.behavioral.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.behavioral.v new file mode 100644 index 0000000..92d45e1 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.behavioral.v @@ -0,0 +1,65 @@ +/* + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 +*/ + + +`ifndef SKY130_FD_SC_MS__XOR3_BEHAVIORAL_V +`define SKY130_FD_SC_MS__XOR3_BEHAVIORAL_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog simulation functional model. + */ + +`timescale 1ns / 1ps +`default_nettype none + +`celldefine +module sky130_fd_sc_ms__xor3 ( + X, + A, + B, + C +); + + // Module ports + output X; + input A; + input B; + input C; + + // Module supplies + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + + // Local signals + wire xor0_out_X; + + // Name Output Other arguments + xor xor0 (xor0_out_X, A, B, C ); + buf buf0 (X , xor0_out_X ); + +endmodule +`endcelldefine + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_BEHAVIORAL_V \ No newline at end of file diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.blackbox.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.blackbox.v new file mode 100644 index 0000000..b198396 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.blackbox.v @@ -0,0 +1,57 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_FD_SC_MS__XOR3_BLACKBOX_V +`define SKY130_FD_SC_MS__XOR3_BLACKBOX_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog stub definition (black box without power pins). + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +(* blackbox *) +module sky130_fd_sc_ms__xor3 ( + X, + A, + B, + C +); + + output X; + input A; + input B; + input C; + + // Voltage supply signals + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + +endmodule + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_BLACKBOX_V diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.functional.pp.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.functional.pp.v new file mode 100644 index 0000000..4a2b9ef --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.functional.pp.v @@ -0,0 +1,72 @@ +/* + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 +*/ + + +`ifndef SKY130_FD_SC_MS__XOR3_FUNCTIONAL_PP_V +`define SKY130_FD_SC_MS__XOR3_FUNCTIONAL_PP_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog simulation functional model. + */ + +`timescale 1ns / 1ps +`default_nettype none + +// Import user defined primitives. +`include "../../models/udp_pwrgood_pp_pg/sky130_fd_sc_ms__udp_pwrgood_pp_pg.v" + +`celldefine +module sky130_fd_sc_ms__xor3 ( + X , + A , + B , + C , + VPWR, + VGND, + VPB , + VNB +); + + // Module ports + output X ; + input A ; + input B ; + input C ; + input VPWR; + input VGND; + input VPB ; + input VNB ; + + // Local signals + wire xor0_out_X ; + wire pwrgood_pp0_out_X; + + // Name Output Other arguments + xor xor0 (xor0_out_X , A, B, C ); + sky130_fd_sc_ms__udp_pwrgood_pp$PG pwrgood_pp0 (pwrgood_pp0_out_X, xor0_out_X, VPWR, VGND); + buf buf0 (X , pwrgood_pp0_out_X ); + +endmodule +`endcelldefine + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_FUNCTIONAL_PP_V \ No newline at end of file diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.functional.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.functional.v new file mode 100644 index 0000000..0f3372a --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.functional.v @@ -0,0 +1,59 @@ +/* + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 +*/ + + +`ifndef SKY130_FD_SC_MS__XOR3_FUNCTIONAL_V +`define SKY130_FD_SC_MS__XOR3_FUNCTIONAL_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog simulation functional model. + */ + +`timescale 1ns / 1ps +`default_nettype none + +`celldefine +module sky130_fd_sc_ms__xor3 ( + X, + A, + B, + C +); + + // Module ports + output X; + input A; + input B; + input C; + + // Local signals + wire xor0_out_X; + + // Name Output Other arguments + xor xor0 (xor0_out_X, A, B, C ); + buf buf0 (X , xor0_out_X ); + +endmodule +`endcelldefine + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_FUNCTIONAL_V \ No newline at end of file diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.pp.blackbox.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.pp.blackbox.v new file mode 100644 index 0000000..c964bb8 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.pp.blackbox.v @@ -0,0 +1,58 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_FD_SC_MS__XOR3_PP_BLACKBOX_V +`define SKY130_FD_SC_MS__XOR3_PP_BLACKBOX_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog stub definition (black box with power pins). + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +(* blackbox *) +module sky130_fd_sc_ms__xor3 ( + X , + A , + B , + C , + VPWR, + VGND, + VPB , + VNB +); + + output X ; + input A ; + input B ; + input C ; + input VPWR; + input VGND; + input VPB ; + input VNB ; +endmodule + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_PP_BLACKBOX_V diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.pp.symbol.svg b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.pp.symbol.svg new file mode 100644 index 0000000..c69dc71 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.pp.symbol.svg @@ -0,0 +1,67 @@ + + + + + + + + + +Data Signals + + +A + + + +B + + + +C + + + +X + + + + +Power + + +VPB + + + +VPWR + + + +VGND + + + +VNB + + + +xor3 +sky130_fd_sc_ms + \ No newline at end of file diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.pp.symbol.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.pp.symbol.v new file mode 100644 index 0000000..1473fef --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.pp.symbol.v @@ -0,0 +1,53 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_FD_SC_MS__XOR3_PP_SYMBOL_V +`define SKY130_FD_SC_MS__XOR3_PP_SYMBOL_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog stub (with power pins) for graphical symbol definition + * generation. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +(* blackbox *) +module sky130_fd_sc_ms__xor3 ( + //# {{data|Data Signals}} + input A , + input B , + input C , + output X , + + //# {{power|Power}} + input VPB , + input VPWR, + input VGND, + input VNB +); +endmodule + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_PP_SYMBOL_V diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.schematic.svg b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.schematic.svg new file mode 100644 index 0000000..73ff300 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.schematic.svg @@ -0,0 +1,75 @@ + + + + + + + + + + + + + + + + + + + + + + + + X + + + + + + A + + + + + + B + + + + + + C + + + + + + + + + + + + + + diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.specify.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.specify.v new file mode 100644 index 0000000..4d2849c --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.specify.v @@ -0,0 +1,32 @@ +/* + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 +*/ + +specify +if ((!B&!C)) (A +=> X) = (0:0:0,0:0:0); +if ((!B&C)) (A -=> X) = (0:0:0,0:0:0); +if ((B&!C)) (A -=> X) = (0:0:0,0:0:0); +if ((B&C)) (A +=> X) = (0:0:0,0:0:0); +if ((!A&!C)) (B +=> X) = (0:0:0,0:0:0); +if ((!A&C)) (B -=> X) = (0:0:0,0:0:0); +if ((A&!C)) (B -=> X) = (0:0:0,0:0:0); +if ((A&C)) (B +=> X) = (0:0:0,0:0:0); +if ((!A&!B)) (C +=> X) = (0:0:0,0:0:0); +if ((!A&B)) (C -=> X) = (0:0:0,0:0:0); +if ((A&!B)) (C -=> X) = (0:0:0,0:0:0); +if ((A&B)) (C +=> X) = (0:0:0,0:0:0); +endspecify \ No newline at end of file diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.symbol.svg b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.symbol.svg new file mode 100644 index 0000000..ec8a1bd --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.symbol.svg @@ -0,0 +1,47 @@ + + + + + + + + + +Data Signals + + +A + + + +B + + + +C + + + +X + + + +xor3 +sky130_fd_sc_ms + \ No newline at end of file diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.symbol.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.symbol.v new file mode 100644 index 0000000..7abe57e --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.symbol.v @@ -0,0 +1,54 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_FD_SC_MS__XOR3_SYMBOL_V +`define SKY130_FD_SC_MS__XOR3_SYMBOL_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog stub (without power pins) for graphical symbol definition + * generation. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +(* blackbox *) +module sky130_fd_sc_ms__xor3 ( + //# {{data|Data Signals}} + input A, + input B, + input C, + output X +); + + // Voltage supply signals + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + +endmodule + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_SYMBOL_V diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.tb.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.tb.v new file mode 100644 index 0000000..645ffed --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.tb.v @@ -0,0 +1,104 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_FD_SC_MS__XOR3_TB_V +`define SKY130_FD_SC_MS__XOR3_TB_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Autogenerated test bench. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +`include "sky130_fd_sc_ms__xor3.v" + +module top(); + + // Inputs are registered + reg A; + reg B; + reg C; + reg VPWR; + reg VGND; + reg VPB; + reg VNB; + + // Outputs are wires + wire X; + + initial + begin + // Initial state is x for all inputs. + A = 1'bX; + B = 1'bX; + C = 1'bX; + VGND = 1'bX; + VNB = 1'bX; + VPB = 1'bX; + VPWR = 1'bX; + + #20 A = 1'b0; + #40 B = 1'b0; + #60 C = 1'b0; + #80 VGND = 1'b0; + #100 VNB = 1'b0; + #120 VPB = 1'b0; + #140 VPWR = 1'b0; + #160 A = 1'b1; + #180 B = 1'b1; + #200 C = 1'b1; + #220 VGND = 1'b1; + #240 VNB = 1'b1; + #260 VPB = 1'b1; + #280 VPWR = 1'b1; + #300 A = 1'b0; + #320 B = 1'b0; + #340 C = 1'b0; + #360 VGND = 1'b0; + #380 VNB = 1'b0; + #400 VPB = 1'b0; + #420 VPWR = 1'b0; + #440 VPWR = 1'b1; + #460 VPB = 1'b1; + #480 VNB = 1'b1; + #500 VGND = 1'b1; + #520 C = 1'b1; + #540 B = 1'b1; + #560 A = 1'b1; + #580 VPWR = 1'bx; + #600 VPB = 1'bx; + #620 VNB = 1'bx; + #640 VGND = 1'bx; + #660 C = 1'bx; + #680 B = 1'bx; + #700 A = 1'bx; + end + + sky130_fd_sc_ms__xor3 dut (.A(A), .B(B), .C(C), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB), .X(X)); + +endmodule + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_TB_V diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.v new file mode 100644 index 0000000..7383dd3 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3.v @@ -0,0 +1,54 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_FD_SC_MS__XOR3_V +`define SKY130_FD_SC_MS__XOR3_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog top module. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +`ifdef USE_POWER_PINS + +`ifdef FUNCTIONAL +`include "sky130_fd_sc_ms__xor3.pp.functional.v" +`else // FUNCTIONAL +`include "sky130_fd_sc_ms__xor3.pp.behavioral.v" +`endif // FUNCTIONAL + +`else // USE_POWER_PINS + +`ifdef FUNCTIONAL +`include "sky130_fd_sc_ms__xor3.functional.v" +`else // FUNCTIONAL +`include "sky130_fd_sc_ms__xor3.behavioral.v" +`endif // FUNCTIONAL + +`endif // USE_POWER_PINS + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_V diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3_1.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3_1.v new file mode 100644 index 0000000..92c4a80 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3_1.v @@ -0,0 +1,119 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_FD_SC_MS__XOR3_1_V +`define SKY130_FD_SC_MS__XOR3_1_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog wrapper for xor3 with size of 1 units. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +`include "sky130_fd_sc_ms__xor3.v" + +`ifdef USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_fd_sc_ms__xor3_1 ( + X , + A , + B , + C , + VPWR, + VGND, + VPB , + VNB +); + + output X ; + input A ; + input B ; + input C ; + input VPWR; + input VGND; + input VPB ; + input VNB ; + sky130_fd_sc_ms__xor3 cell ( + .X(X), + .A(A), + .B(B), + .C(C), + .VPWR(VPWR), + .VGND(VGND), + .VPB(VPB), + .VNB(VNB) + ); + +endmodule +`endcelldefine + +/*********************************************************/ +`else // If not USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_fd_sc_ms__xor3_1 ( + X , + A , + B , + C , + VPWR, + VGND, + VPB , + VNB +); + + output X ; + input A ; + input B ; + input C ; + input VPWR; + input VGND; + input VPB ; + input VNB ; + + // Voltage supply signals + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + + sky130_fd_sc_ms__xor3 cell ( + .X(X), + .A(A), + .B(B), + .C(C) + ); + +endmodule +`endcelldefine + +/*********************************************************/ +`endif // USE_POWER_PINS + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_1_V diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3_2.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3_2.v new file mode 100644 index 0000000..675d438 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3_2.v @@ -0,0 +1,119 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_FD_SC_MS__XOR3_2_V +`define SKY130_FD_SC_MS__XOR3_2_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog wrapper for xor3 with size of 2 units. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +`include "sky130_fd_sc_ms__xor3.v" + +`ifdef USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_fd_sc_ms__xor3_2 ( + X , + A , + B , + C , + VPWR, + VGND, + VPB , + VNB +); + + output X ; + input A ; + input B ; + input C ; + input VPWR; + input VGND; + input VPB ; + input VNB ; + sky130_fd_sc_ms__xor3 cell ( + .X(X), + .A(A), + .B(B), + .C(C), + .VPWR(VPWR), + .VGND(VGND), + .VPB(VPB), + .VNB(VNB) + ); + +endmodule +`endcelldefine + +/*********************************************************/ +`else // If not USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_fd_sc_ms__xor3_2 ( + X , + A , + B , + C , + VPWR, + VGND, + VPB , + VNB +); + + output X ; + input A ; + input B ; + input C ; + input VPWR; + input VGND; + input VPB ; + input VNB ; + + // Voltage supply signals + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + + sky130_fd_sc_ms__xor3 cell ( + .X(X), + .A(A), + .B(B), + .C(C) + ); + +endmodule +`endcelldefine + +/*********************************************************/ +`endif // USE_POWER_PINS + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_2_V diff --git a/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3_4.v b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3_4.v new file mode 100644 index 0000000..0e9db33 --- /dev/null +++ b/libraries/sky130_fd_sc_ms/v0.0.0/cells/xor3/sky130_fd_sc_ms__xor3_4.v @@ -0,0 +1,119 @@ +/** + * Copyright 2020 The SkyWater PDK Authors + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +`ifndef SKY130_FD_SC_MS__XOR3_4_V +`define SKY130_FD_SC_MS__XOR3_4_V + +/** + * xor3: 3-input exclusive OR. + * + * X = A ^ B ^ C + * + * Verilog wrapper for xor3 with size of 4 units. + * + * WARNING: This file is autogenerated, do not modify directly! + */ + +`timescale 1ns / 1ps +`default_nettype none + +`include "sky130_fd_sc_ms__xor3.v" + +`ifdef USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_fd_sc_ms__xor3_4 ( + X , + A , + B , + C , + VPWR, + VGND, + VPB , + VNB +); + + output X ; + input A ; + input B ; + input C ; + input VPWR; + input VGND; + input VPB ; + input VNB ; + sky130_fd_sc_ms__xor3 cell ( + .X(X), + .A(A), + .B(B), + .C(C), + .VPWR(VPWR), + .VGND(VGND), + .VPB(VPB), + .VNB(VNB) + ); + +endmodule +`endcelldefine + +/*********************************************************/ +`else // If not USE_POWER_PINS +/*********************************************************/ + +`celldefine +module sky130_fd_sc_ms__xor3_4 ( + X , + A , + B , + C , + VPWR, + VGND, + VPB , + VNB +); + + output X ; + input A ; + input B ; + input C ; + input VPWR; + input VGND; + input VPB ; + input VNB ; + + // Voltage supply signals + supply1 VPWR; + supply0 VGND; + supply1 VPB ; + supply0 VNB ; + + sky130_fd_sc_ms__xor3 cell ( + .X(X), + .A(A), + .B(B), + .C(C) + ); + +endmodule +`endcelldefine + +/*********************************************************/ +`endif // USE_POWER_PINS + +`default_nettype wire +`endif // SKY130_FD_SC_MS__XOR3_4_V