5d891b2cd8
* New: In CRL::NamingScheme, add a flag VstNoLowerCase, and its management it in the Verilog to VHDL converter. * Change: In CRL::BlifParser::Model::toVhdlModels(), disable the lowercasing of identifiers. We shouldn't apply Alliance VHDL subset constraits when reading blif files. So we will see uppercase identifiers in Coriolis. * Change: In CRL::VstParser, no longer lowercase identifiers that are *not* VHDL keywords. Uppercases are legals in VHDL... * New: In CRL::Catalog::State, add a new flag VstNoLowerCase to tell if the VST driver should keep the uppercases. * Change: In CRL::VhdlEntity, add a VstNolowerCase flag to disable the lowercasing. * Change: In CRL::vstDriver, lower case the file name if needed. remove the previously opened filename if it differs from the lowercased one. * Change: In UnicornGui CTOR, disable VHDL enforcement for the Blif parser. |
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.. | ||
images | ||
unicorn | ||
CMakeLists.txt | ||
CgtMain.cpp | ||
ExportCellDialog.cpp | ||
ImportCell.cpp | ||
ImportCellDialog.cpp | ||
OpenCellDialog.cpp | ||
PyUnicorn.cpp | ||
PyUnicornGui.cpp | ||
SaveCellDialog.cpp | ||
Unicorn.qrc | ||
UnicornGui.cpp | ||
cgt.py | ||
coriolis.py |