coriolis/vlsisapd/examples/dtr/example.dtr.xml

22 lines
953 B
XML

<technology name="example" unit="micro" version="rev.A">
<physical_rules>
<!-- transistor -->
<rule name="transistorMinL" value="0.10" ref="ref1"/>
<rule name="transistorMinW" value="0.20" ref="ref2"/>
<!-- minWidth -->
<rule name="minWidth" layer="metal1" value="0.15" ref="ref3"/>
<!-- minSpacing -->
<rule name="minSpacing" layer="metal1" value="0.20" ref="ref4"/>
<rule name="minSpacing" layer1="active" layer2="poly" value="0.10" ref="ref5"/>
<!-- minExtension -->
<arule name="minExtension" layer1="poly" layer2="active" value="0.20" ref="ref6"/>
<!-- minArea -->
<rule name="minArea" type="area" layer="metal1" value="0.100" ref="ref7"/>
</physical_rules>
</technology>