coriolis/crlcore/etc/symbolic
Jean-Paul Chaput eea67a9111 Added static bloat profile in Katana.
* Change: In bootstrap/FindBoostrap.cmake, remove the -fsanitize=address
    as it requires the "san" librarie which may be difficult to install.
* Change: In CRL/symbolic/cmos45/kite.py, decrease the METAL3 pitch from
    10l to 8l. This is for testing with 4 routing metal only technology
    like AMS c35b4 symbolic.
* Change: In Katana/BloatProfile, add static bloat option, that is, only
    cell bloated in the first pass will be bloated again in subsequent
    ones.
      Add a "katana.bloatOverloadAdd" parameter to more easily control the
    amount added to the computed overload.
* Change: In Oroshi, start integration of multi capacitors as generator.
    Translate generator parameter into CapacitorStack ones. Add code for
    routing unit capacitor.
2020-01-23 14:03:59 +01:00
..
cmos Added message when loading the technology/configuration files. 2019-11-15 14:40:59 +01:00
cmos45 Added static bloat profile in Katana. 2020-01-23 14:03:59 +01:00
ispd05 ISPD05 loading speed issues. IO PAD support for LEF importation. 2019-04-22 12:16:16 +02:00
phenitec06 Added core2chip support for Phenitec80. 2019-09-17 17:05:54 +02:00
vsc200 Corrections in the Dijkstra global routing (ripup) mechanism. 2018-04-16 12:10:48 +02:00
__init__.py Migrating the initialisation system to be completely Python-like. 2019-10-28 18:09:14 +01:00