coriolis/karakaze/python
Jean-Paul Chaput 057501a8df Capacitor & resistor integration in the Slicing Tree.
* New: In Karakaze/Oceane.py, now also read capacitor & resistors parameters.
    In AnalogDesign.readParameters(), get the capacitor parameters from
    Oceane into the "device spec" (dspec). Translate form OSI unit to
    Coriolis units (F -> pF).
* Bug: In Bora::NodeSets::create(), Capacitor matrix parameters where never
    read due to a misplaced curly brace (at the matrixRange dynamic_cast<>
    test).
* Change: In Bora/PyDSlicingNode, now check that the parameter is either
    a StepParameterRange or a MatrixParameterRange.
      Also add a check that the Instance name exists...
* Bug: In Bora::SlicingPlotWidget::updateSelectedPoint(), as we display
    only the transistor parameters in dynamic labels, do not forget to
    skip resistor and capacitor. Otherwise we end up in out of bound
    access in the vector of labels.
2020-01-23 14:07:19 +01:00
..
AnalogDesign.py Capacitor & resistor integration in the Slicing Tree. 2020-01-23 14:07:19 +01:00
CMakeLists.txt Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
Oceane.py Capacitor & resistor integration in the Slicing Tree. 2020-01-23 14:07:19 +01:00
__init__.py Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00