159 lines
4.6 KiB
HTML
159 lines
4.6 KiB
HTML
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original version by: Nikos Drakos, CBLU, University of Leeds
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<TITLE>DpgenNor4</TITLE>
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<H1><A NAME="SECTION000110000000000000000">
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DpgenNor4</A>
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</H1>
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<UL>
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<LI><SPAN CLASS="textbf">Name</SPAN> : DpgenNor4 - Nor4 Macro-Generator
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</LI>
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<LI><SPAN CLASS="textbf">Synopsys</SPAN> :
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<PRE>
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Generate ( 'DpgenNor4', modelname
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, param = { 'nbit' : n
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, 'drive' : d
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, 'physical' : True
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, 'behavioral' : True
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}
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)
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</PRE>
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</LI>
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<LI><SPAN CLASS="textbf">Description</SPAN> : Generates a <code>n</code> bits four inputs NOR with an output power of <code>d</code> named <code>modelname</code>.
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</LI>
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<LI><SPAN CLASS="textbf">Terminal Names</SPAN> :
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<UL>
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<LI><SPAN CLASS="textbf">i0</SPAN> : input (<code>n</code> bits)
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</LI>
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<LI><SPAN CLASS="textbf">i1</SPAN> : input (<code>n</code> bits)
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</LI>
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<LI><SPAN CLASS="textbf">i2</SPAN> : input (<code>n</code> bits)
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</LI>
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<LI><SPAN CLASS="textbf">i3</SPAN> : input (<code>n</code> bits)
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</LI>
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<LI><SPAN CLASS="textbf">nq</SPAN> : output (<code>n</code> bits)
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</LI>
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<LI><SPAN CLASS="textbf">vdd</SPAN> : power
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</LI>
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<LI><SPAN CLASS="textbf">vss</SPAN> : ground
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</LI>
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</UL>
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</LI>
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<LI><SPAN CLASS="textbf">Parameters</SPAN> : Parameters are given in the map <code>param</code>.
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<UL>
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<LI><SPAN CLASS="textbf">nbit</SPAN> (mandatory) : Defines the size of the generator
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</LI>
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<LI><SPAN CLASS="textbf">drive</SPAN> (optional) : Defines the output power of the gates
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<UL>
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<LI>Valid drive are : 1 or 4
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</LI>
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<LI>If this parameter is not defined, it's value is the smallest one permitted
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</LI>
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</UL>
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</LI>
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<LI><SPAN CLASS="textbf">physical</SPAN> (optional, default value : False) : In order to generate a layout
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</LI>
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<LI><SPAN CLASS="textbf">behavioral</SPAN> (optional, default value : False) : In order to generate a behavior
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</LI>
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</UL>
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</LI>
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<LI><SPAN CLASS="textbf">Behavior</SPAN> :
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<PRE>
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nq <= not ( i0 or i1 or i2 or i3 )
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</PRE>
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</LI>
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<LI><SPAN CLASS="textbf">Example</SPAN> :
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<PRE>
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from stratus import *
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class inst_nor4 ( Model ) :
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def Interface ( self ) :
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self.in1 = SignalIn ( "in1", 15 )
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self.in2 = SignalIn ( "in2", 15 )
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self.in3 = SignalIn ( "in3", 15 )
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self.in4 = SignalIn ( "in4", 15 )
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self.out = SignalOut ( "o", 15 )
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self.vdd = VddIn ( "vdd" )
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self.vss = VssIn ( "vss" )
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def Netlist ( self ) :
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Generate ( 'DpgenNor4', 'nor4_15'
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, param = { 'nbit' : 15
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, 'physical' : True
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}
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)
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self.I = Inst ( 'nor4_15', 'inst'
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, map = { 'i0' : self.in1
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, 'i1' : self.in2
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, 'i2' : self.in3
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, 'i3' : self.in4
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, 'nq' : self.out
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, 'vdd' : self.vdd
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, 'vss' : self.vss
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}
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)
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def Layout ( self ) :
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Place ( self.I, NOSYM, Ref(0, 0) )
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</PRE>
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</LI>
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</UL>
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<BR> <HR>
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<ADDRESS>
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Sophie B<small>ELLOEIL</small><br>20051116.1
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</ADDRESS>
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