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riscv
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coriolis
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https://gitlab.lip6.fr/vlsi-eda/coriolis.git
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Jean-Paul Chaput
2cfd9a0c51
Increase the display threshold of GCell edges (visible at lower zoom).
2021-10-07 00:41:12 +02:00
..
45
First step in supporting ISPD18 detailed routing benchmarks.
2019-03-29 11:07:55 +01:00
common
Increase the display threshold of GCell edges (visible at lower zoom).
2021-10-07 00:41:12 +02:00
node45
Migration towards Python3, first stage: still based on C-Macros.
2021-09-19 19:41:24 +02:00
node180
Migration towards Python3, first stage: still based on C-Macros.
2021-09-19 19:41:24 +02:00
node600
Migration towards Python3, first stage: still based on C-Macros.
2021-09-19 19:41:24 +02:00
symbolic
Migration towards Python3, first stage: still based on C-Macros.
2021-09-19 19:41:24 +02:00
CMakeLists.txt
Bug fix, restore the FreePDK 45 (real) support.
2020-04-27 10:34:19 +02:00