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Jean-Paul Chaput 81f3b2fa56 * ./cumulus: 
- Bug: In placeandroute.py/createGrid(), VIAs of the big clock grid must
        have the same width as the wires (12l). But due to the layer extension
        the VIA side must be of 11l.
    - Bug: In placeandroute.py/createGrid(), wires connecting cell clock pin
        to the clock trunk must respect the preferred routing direction.
        The only exception being when the wire is completly enclosed under
        the trunk wire. This is for the obstacle stage of the detailed router.
 		2012-01-02 21:20:36 +00:00
bootstrap SoC install is in /soc/coriolis2/ 2011-10-19 19:45:57 +00:00
chamsin MetaCapacitor in progress 2008-07-24 15:39:12 +00:00
crlcore * ./crlcore: 2012-01-02 21:20:13 +00:00
cumulus * ./cumulus: 2012-01-02 21:20:36 +00:00
equinox * <All Tools>/CMakeLists.txt: 2011-02-02 22:25:31 +00:00
hurricane * ./hurricane/src/hurricane: 2012-01-02 21:19:31 +00:00
ispd * ./ispd: 2010-08-25 11:42:44 +00:00
katabatic * <All Tools>/CMakeLists.txt: 2011-02-02 22:25:23 +00:00
kite * <All Tools>/CMakeLists.txt: 2011-02-02 22:25:26 +00:00
knik Add library version to flute. 2011-02-04 11:10:02 +00:00
mauka * <All Tools>/CMakeLists.txt: 2011-02-02 22:48:45 +00:00
metis * <All Tools>/CMakeLists.txt: 2011-02-02 22:48:42 +00:00
nimbus * ./nimbus: 2011-04-12 20:37:23 +00:00
solstice * <All Tools>/CMakeLists.txt: 2011-02-02 22:25:28 +00:00
stratus1 MAJ d un message d erreur pour arreter de chercher 500 ans ce qui ne va pas quand on a oublie l existance du nouveau fichier de config .... 2011-10-03 11:57:26 +00:00
unicorn * ./unicorn: 2011-04-12 20:38:31 +00:00
vlsisapd Added classes to handle equations (HighLevelCstr, DDP, DesignerCstrOC, NRCCstr), all child of Equation. 2011-11-08 17:59:52 +00:00