riscv
/
coriolis
mirror of https://gitlab.lip6.fr/vlsi-eda/coriolis.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
coriolis/bora/src
History
Jean-Paul Chaput 7c85835c8f Added partial support for Pad (component) in RoutinPad. 
* New: In Hurricane::RoutingPad, added support if the supporting component
    is a Pad. The source/target positions are computed according to the
    most likely direction.
      Change the _getEntityAsComponent() function into an inline template
    _getEntityAs<T>().
      Change the flags from an enum to static const uint32_t.
* Change: In Anabatic::Configuration, use _getEntityAs<T>.
* Change: In Anabatic::Dijkstra, use _getEntityAs<T>.
* Change: In Anabatic::NetBuilder, use _getEntityAs<T>.
* Change: In Katabatic::LoadGrByNet, use _getEntityAs<T>.
* Change: In Katana::ProtectRoutingPads, use _getEntityAs<T>.
* Change: In Bora::AnalogDistance, use _getEntityAs<T>.
* Change: In Etesian::EtesianEngine, use _getEntityAs<T>.
 		2022-10-27 19:42:13 +02:00
..
attic Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
bora Added partial support for Pad (component) in RoutinPad. 2022-10-27 19:42:13 +02:00
BoraEngine.cpp Improve symmetry management for analog designs. 2020-04-10 12:15:23 +02:00
BoxSet.cpp Bug fixes in SlicingTree, bad refcount incrementation of BoxSet. 2019-11-22 18:29:09 +01:00
CMakeLists.txt Fix library linking problem for gcc 9 and above (Ubuntu 20/Debian 11). 2021-11-22 00:05:48 +01:00
ChannelRouting.cpp Implementation of a red-black tree and an interval tree. 2018-11-07 23:48:43 +01:00
DSlicingNode.cpp Added Resistor support. Completed Capacitor & Resistor support in Bora. 2019-11-12 02:21:03 +01:00
GraphicBoraEngine.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
HSlicingNode.cpp Capacitor & resistor integration in the Slicing Tree. 2020-01-23 14:07:19 +01:00
HVSetState.cpp Groudwork for routing density driven placement. Compliance with clang 5.0.1. 2019-12-09 01:57:44 +01:00
HVSlicingNode.cpp Improve symmetry management for analog designs. 2020-04-10 12:15:23 +02:00
NodeSets.cpp Capacitor support, at last. 2020-03-15 17:56:09 +01:00
ParameterRange.cpp First stage in analog capacitor integration 2019-11-07 17:05:49 +01:00
Pareto.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
PyBora.cpp Migration towards Python3, first stage: still based on C-Macros. 2021-09-19 19:41:24 +02:00
PyBoraEngine.cpp Groudwork for routing density driven placement. Compliance with clang 5.0.1. 2019-12-09 01:57:44 +01:00
PyDSlicingNode.cpp Migration towards Python3, first stage: still based on C-Macros. 2021-09-19 19:41:24 +02:00
PyGraphicBoraEngine.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
PyHSlicingNode.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
PyMatrixParameterRange.cpp Groudwork for routing density driven placement. Compliance with clang 5.0.1. 2019-12-09 01:57:44 +01:00
PyParameterRange.cpp Clarify semantic of flatten Collections (walkthrough). 2020-03-10 12:10:53 +01:00
PyRHSlicingNode.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
PyRVSlicingNode.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
PySlicingNode.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
PyStepParameterRange.cpp First stage in analog capacitor integration 2019-11-07 17:05:49 +01:00
PyVSlicingNode.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
RHSlicingNode.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
RHVSlicingNode.cpp Implementation of a red-black tree and an interval tree. 2018-11-07 23:48:43 +01:00
RVSlicingNode.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
SlicingDataModel.cpp Correct computation of H/W ratio in Bora (Igor Zivanovic). 2020-04-08 15:09:20 +02:00
SlicingDataWidget.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
SlicingNode.cpp Bug fix, reset Cell flags after unrouting an analog design. 2020-04-30 00:38:32 +02:00
SlicingPlotWidget.cpp Nicer looking of the dots in Bora::SlicingPlotWidget (IMHO). 2022-06-05 20:36:01 +02:00
SlicingWidget.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
VSlicingNode.cpp Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00
cpps Analog integration part II. Analog place & route (slicing tree). 2018-10-18 18:10:01 +02:00