155 lines
4.8 KiB
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155 lines
4.8 KiB
HTML
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original version by: Nikos Drakos, CBLU, University of Leeds
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<TITLE>DpgenRom4</TITLE>
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<H1><A NAME="SECTION000300000000000000000">
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DpgenRom4</A>
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</H1>
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<UL>
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<LI><SPAN CLASS="textbf">Name</SPAN> : DpgenRom4 - 4 words ROM Macro-Generator
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</LI>
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<LI><SPAN CLASS="textbf">Synopsys</SPAN> :
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<PRE>
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Generate ( 'DpgenRom4', modelname
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, param = { 'nbit' : n
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, 'val0' : constVal0
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, 'val1' : constVal1
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, 'val2' : constVal2
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, 'val3' : constVal3
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, 'physical' : True
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}
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)
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</PRE>
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</LI>
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<LI><SPAN CLASS="textbf">Description</SPAN> : Generates a <code>n</code> bits 4 words optimized ROM named <code>modelname</code>.
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</LI>
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<LI><SPAN CLASS="textbf">Terminal Names</SPAN> :
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<UL>
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<LI><SPAN CLASS="textbf">sel1</SPAN> : upper bit of the address of the value (input, 1 bit)
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</LI>
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<LI><SPAN CLASS="textbf">sel0</SPAN> : lower bit of the address of the value (input, 1 bit)
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</LI>
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<LI><SPAN CLASS="textbf">q</SPAN> : the selected word (output, <code>n</code> bits)
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</LI>
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<LI><SPAN CLASS="textbf">vdd</SPAN> : power
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</LI>
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<LI><SPAN CLASS="textbf">vss</SPAN> : ground
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</LI>
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</UL>
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</LI>
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<LI><SPAN CLASS="textbf">Parameters</SPAN> : Parameters are given in the map <code>param</code>.
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<UL>
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<LI><SPAN CLASS="textbf">nbit</SPAN> (mandatory) : Defines the size of the generator
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</LI>
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<LI><SPAN CLASS="textbf">val0</SPAN> (mandatory) : Defines the first word
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</LI>
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<LI><SPAN CLASS="textbf">val1</SPAN> (mandatory) : Defines the second word
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</LI>
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<LI><SPAN CLASS="textbf">val2</SPAN> (mandatory) : Defines the third word
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</LI>
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<LI><SPAN CLASS="textbf">val3</SPAN> (mandatory) : Defines the fourth word
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</LI>
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<LI><SPAN CLASS="textbf">physical</SPAN> (optional, default value : False) : In order to generate a layout
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</LI>
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</UL>
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</LI>
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<LI><SPAN CLASS="textbf">Behavior</SPAN> :
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<PRE>
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q <= WITH sel1 & sel0 SELECT constVal0 WHEN B"00",
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constVal1 WHEN B"01",
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constVal2 WHEN B"10",
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constVal3 WHEN B"11";
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</PRE>
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</LI>
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<LI><SPAN CLASS="textbf">Example</SPAN> :
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<PRE>
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from stratus import *
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class inst_rom4 ( Model ) :
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def Interface ( self ) :
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self.sel0 = SignalIn ( "sel0", 1 )
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self.sel1 = SignalIn ( "sel1", 1 )
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self.q = SignalOut ( "dataout", 4 )
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self.vdd = VddIn ( "vdd" )
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self.vss = VssIn ( "vss" )
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def Netlist ( self ) :
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Generate ( 'DpgenRom4', 'rom4_0b1010_0b1100_0b1111_0b0001'
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, param = { 'nbit' : 4
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, 'val0' : "0b1010"
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, 'val1' : "0b1100"
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, 'val2' : "0b1111"
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, 'val3' : "0b0001"
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, 'physical' : True
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}
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)
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self.I = Inst ( 'rom4_0b1010_0b1100_0b1111_0b0001', 'inst'
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, map = { 'sel0' : self.sel0
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, 'sel1' : self.sel1
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, 'q' : self.q
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, 'vdd' : self.vdd
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, 'vss' : self.vss
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}
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)
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def Layout ( self ) :
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Place ( self.I, NOSYM, Ref(0, 0) )
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</PRE>
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</LI>
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</UL>
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<BR> <HR>
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<ADDRESS>
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Sophie B<small>ELLOEIL</small><br>20051116.1
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</ADDRESS>
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