239 lines
6.2 KiB
TeX
239 lines
6.2 KiB
TeX
\documentclass[twoside]{book}
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% Packages required by doxygen
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\usepackage{fixltx2e}
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\usepackage{calc}
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\usepackage{doxygen}
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\usepackage[export]{adjustbox} % also loads graphicx
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\usepackage{graphicx}
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\usepackage[utf8]{inputenc}
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\usepackage{makeidx}
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\usepackage{multicol}
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\usepackage{multirow}
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\PassOptionsToPackage{warn}{textcomp}
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\usepackage{textcomp}
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\usepackage[nointegrals]{wasysym}
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\usepackage[table]{xcolor}
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% Font selection
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\usepackage[scaled=.90]{helvet}
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% Page & text layout
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a4paper,%
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% Headers & footers
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\fancyfoot[RE]{\fancyplain{}{\bfseries\scriptsize Generated by Doxygen }}
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\renewcommand{\chaptermark}[1]{%
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}
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\renewcommand{\sectionmark}[1]{%
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\markright{\thesection\ #1}%
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}
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% Indices & bibliography
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\usepackage{natbib}
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\usepackage[titles]{tocloft}
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\setcounter{tocdepth}{3}
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\setcounter{secnumdepth}{5}
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\makeindex
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% Hyperlinks (required, but should be loaded last)
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\usepackage{ifpdf}
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\ifpdf
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\usepackage[pdftex,pagebackref=true]{hyperref}
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\else
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\usepackage[ps2pdf,pagebackref=true]{hyperref}
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\fi
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\hypersetup{%
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colorlinks=true,%
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linkcolor=blue,%
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citecolor=blue,%
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unicode%
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}
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% Custom commands
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\newcommand{\clearemptydoublepage}{%
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\newpage{\pagestyle{empty}\cleardoublepage}%
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}
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\usepackage{caption}
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\captionsetup{labelsep=space,justification=centering,font={bf},singlelinecheck=off,skip=4pt,position=top}
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%===== C O N T E N T S =====
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\begin{document}
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% Titlepage & ToC
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\hypersetup{pageanchor=false,
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bookmarksnumbered=true,
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pdfencoding=unicode
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}
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\pagenumbering{alph}
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\begin{titlepage}
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\vspace*{7cm}
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\begin{center}%
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{\Large V\+L\+SI S\+A\+PD }\\
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\vspace*{1cm}
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{\large Generated by Doxygen 1.8.13}\\
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\end{center}
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\end{titlepage}
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\clearemptydoublepage
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\pagenumbering{roman}
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\tableofcontents
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\clearemptydoublepage
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\pagenumbering{arabic}
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\hypersetup{pageanchor=true}
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%--- Begin generated contents ---
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\chapter{Presentation}
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\label{index}\hypertarget{index}{}\input{index}
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\chapter{A\+G\+DS Format}
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\label{agds}
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\Hypertarget{agds}
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\input{agds}
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\chapter{C\+IF Format}
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\label{cif}
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\Hypertarget{cif}
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\input{cif}
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\chapter{Links \& Contacts}
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\label{contact}
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\Hypertarget{contact}
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\input{contact}
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\chapter{D\+TR Format}
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\label{dtr}
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\Hypertarget{dtr}
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\input{dtr}
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\chapter{O\+P\+E\+N\+C\+H\+A\+MS Format}
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\label{openchams}
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\Hypertarget{openchams}
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\input{openchams}
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\chapter{S\+P\+I\+CE Format}
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\label{spice}
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\Hypertarget{spice}
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\input{spice}
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\chapter{Data Structure Documentation}
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\input{class_d_t_r_1_1_a_rule}
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\input{class_open_chams_1_1_bloc}
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\input{class_s_p_i_c_e_1_1_capacitor}
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\input{class_c_i_f_1_1_circuit}
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\input{class_open_chams_1_1_circuit}
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\input{class_s_p_i_c_e_1_1_circuit}
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\input{class_open_chams_1_1_net_1_1_connection}
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\input{class_open_chams_1_1_operator_1_1_constraint}
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\input{class_s_p_i_c_e_1_1_current}
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\input{class_open_chams_1_1_d_d_p}
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\input{class_open_chams_1_1_designer_cstr_o_c}
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\input{class_open_chams_1_1_device}
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\input{class_open_chams_1_1_d_slicing_node}
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\input{class_d_t_r_1_1_d_t_r_exception}
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\input{class_a_g_d_s_1_1_element}
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\input{class_open_chams_1_1_equation}
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\input{class_open_chams_1_1_group}
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\input{class_open_chams_1_1_high_level_cstr}
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\input{class_open_chams_1_1_h_slicing_node}
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\input{class_open_chams_1_1_h_v_slicing_node}
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\input{class_open_chams_1_1_schematic_1_1_infos}
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\input{class_open_chams_1_1_instance}
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\input{class_s_p_i_c_e_1_1_instance}
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\input{class_open_chams_1_1_instance_point}
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\input{class_open_chams_1_1_intermediate_point}
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\input{class_open_chams_1_1_layout}
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\input{class_a_g_d_s_1_1_library}
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\input{struct_open_chams_1_1map__item}
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\input{struct_s_p_i_c_e_1_1map__item}
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\input{class_s_p_i_c_e_1_1_mosfet}
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\input{class_name}
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\input{class_open_chams_1_1_net}
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\input{class_open_chams_1_1_netlist}
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\input{class_open_chams_1_1_node}
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\input{class_open_chams_1_1_n_r_c_cstr}
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\input{class_open_chams_1_1_open_chams_exception}
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\input{class_open_chams_1_1_operator}
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\input{class_open_chams_1_1_parameters}
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\input{class_c_i_f_1_1_polygon}
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\input{class_open_chams_1_1_port}
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\input{class_open_chams_1_1_port_point}
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\input{class_a_g_d_s_1_1_rectangle}
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\input{class_s_p_i_c_e_1_1_resistor}
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\input{class_open_chams_1_1_r_slicing_node}
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\input{class_d_t_r_1_1_rule}
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\input{class_open_chams_1_1_schematic}
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\input{class_open_chams_1_1_simul_model}
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\input{class_open_chams_1_1_sizing}
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\input{class_open_chams_1_1_slicing_node}
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\input{class_s_p_i_c_e_1_1_source}
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\input{class_s_p_i_c_e_1_1_spice_exception}
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\input{class_a_g_d_s_1_1_structure}
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\input{class_s_p_i_c_e_1_1_subckt}
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\input{class_d_t_r_1_1_techno}
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\input{class_open_chams_1_1_transistor}
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\input{class_s_p_i_c_e_1_1_value}
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\input{class_s_p_i_c_e_1_1_voltage}
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\input{class_open_chams_1_1_v_slicing_node}
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\input{class_open_chams_1_1_wire}
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\input{class_open_chams_1_1_wire_point}
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%--- End generated contents ---
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% Index
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\backmatter
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\newpage
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\phantomsection
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\clearemptydoublepage
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\addcontentsline{toc}{chapter}{Index}
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\printindex
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\end{document}
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