\begin{itemize}
    \item Name : DpgenShrot -- Shift/Rotation Macro-Generator
    \item Description : Generates a \verb-n- bits shift/rotation operator named \verb-modelname-.
    \item How it works :
    \begin{itemize}
        \item if the \verb-op[0]- signal is set to \verb-one-, performs a right shift/rotation , otherwise left shift/rotation occurs.
        \item if the \verb-op[1]- signal is set to \verb-one-, performs an arithmetic shift (only meaningful in case of a right shift).
        \item if the \verb-op[2]- signal is set to \verb-one-, performs a rotation, otherwise performs a shift..
        \item \verb-shamt- specifies the shift amount. The width of this signal (\verb-Y-) is computed from the operator's width : \verb-Y = ceil(log2(n)) -- 1
    \end{itemize}
    \item Terminal Names :
    \begin{itemize}
        \item op : select the kind of shift/rotation (input, 3 bits)
        \item shamt : the shift amount (input, \verb-Y- bits)
        \item i : value to shift (input, \verb-n- bits)
        \item o : output (\verb-n- bits)
        \item vdd : power
        \item vss : ground
    \end{itemize}
    \item Parameters : Parameters are given with a map called \verb-param-.
    \begin{itemize}
        \item nbit : Defines the size of the generator
    \end{itemize}
%    \item Behavior :
%\begin{verbatim}
%\end{verbatim}
    \item Example :
\begin{verbatim}
class myClass ( Model ) :
  def Interface ( self ) :
    self._rotop     = LogicIn  ( "rotop",     3 )
    
    self._instshamt = LogicIn  ( "instshamt", 3 )
    
    self._insti     = LogicIn  ( "insti",     8 )
    
    self._insto     = LogicOut ( "insto",     8 )
    
    self._vdd       = VddIn    ( "vdd" )
    self._vss       = VssIn    ( "vss" )
    
  def Netlist ( self ) :
      
    Inst ( 'DpgenShrot'
         , param = { 'nbit' : 8 }
         , map  = { 'op'    : self._rotop
                  , 'shamt' : self._instshamt
                  , 'i'     : self._insti
                  , 'o'     : self._insto
                  , 'vdd'   : self._vdd
                  , 'vss'   : self._vss
                  }
         )
\end{verbatim}
\end{itemize}
