\begin{itemize}
    \item Name : DpgenNand2mask -- Programmable Mask Macro-Generator
    \item Description : Generates a \verb-n- bits conditionnal NAND mask named \verb-modelname-.
    \item How it works :
    \begin{itemize}
        \item if the \verb-cmd- signal is set to \verb-zero-, the mask is NOT applied, so the whole operator behaves like an inverter.
        \item if the \verb-cmd- signal is set to \verb-one-, the mask is applied, the output is the \emph{complemented} result of the input value \emph{ANDed} with the mask (suplied by \verb-constVal-).
        \item The constant \verb-constVal- is given to the macro-generator call, therefore the value cannot be changed afterward : it's hard wired in the operator.
        \item A common error is to give a real constant for the \verb-constVal- argument. Be aware that it is a character string.
    \end{itemize}
    \item Terminal Names :
    \begin{itemize}
        \item cmd : mask control ( 1 bit )
        \item i0 : input ( \verb-n- bits )
        \item nq : output ( \verb-n- bits )
        \item vdd : power
        \item vss : ground
    \end{itemize}
    \item Parameters : Parameters are given with a map called \verb-param-.
    \begin{itemize}
        \item nbit : Defines the size of the generator
        \item const : Defines the constant
    \end{itemize}
    \item Behavior :
\begin{verbatim}
nq <= WITH cmd SELECT not(i0)                 WHEN '0',
                      not(i0 and X"0000FFFF") WHEN '1';
\end{verbatim}
    \item Example :
\begin{verbatim}
class myClass ( Model ) :
  def Interface ( self ) :
    self._in    = LogicIn  (  "in", 8 )
    self._cmd   = LogicIn  ( "cmd", 1 )
    
    self._out   = LogicOut ( "out", 8 )

    self._vdd   = VddIn    ( "vdd" )
    self._vss   = VssIn    ( "vss" )
    
  def Netlist ( self ) :
      
    Inst ( 'DpgenNand2mask'
         , param = { 'nbit'    : 8
                   , 'const'   : "0b000111"
                   }
         , map   = { 'i0'      : self._in
                   , 'cmd'     : self._cmd
                   , 'nq'      : self._out
                   , 'vdd'     : self._vdd
                   , 'vss'     : self._vss
                   }
         )
\end{verbatim}
\end{itemize}
