\begin{itemize}
    \item Name : DpgenSff -- Static Flip-Flop Macro-Generator
    \item Description : Generates a n bits static flip-flop named \verb-modelname-. The two latches of this flip-flop are static, i.e. each one is made of two interters looped together.
    \item How it works : 
    \begin{itemize}
        \item  when wen is set to \verb-one-, enables the writing of the flip-flop
    \end{itemize}
    \item Terminal Names :
    \begin{itemize}
        \item wen : write enable (1 bit)
        \item ck : clock signal (1 bit)
        \item i0 : data input (\verb-n- bits)
        \item q : output (\verb-n- bits)
        \item vdd : power
        \item vss : ground
    \end{itemize}
    \item Parameters : Parameters are given with a map called \verb-param-.
    \begin{itemize}
        \item nbit : Defines the size of the generator
    \end{itemize}
%    \item Behavior :
%\begin{verbatim}
%\end{verbatim}
    \item Example :
\begin{verbatim}
class myClass ( Model ) :
  def Interface ( self ) :
    self._ck    = LogicIn  (  "ck", 1 )
    self._wen   = LogicIn  ( "wen", 1 )
    self._in    = LogicIn  (  "in", 4 )
    
    self._out   = LogicOut ( "out", 4 )

    self._vdd   = VddIn    ( "vdd" )
    self._vss   = VssIn    ( "vss" )
    
  def Netlist ( self ) :
      
    Inst ( 'DpgenSff'
         , param = { 'nbit' : 4 }
         , map  = { "wen"   : self._wen
                  , "ck"    : self._ck
                  , "i0"    : self._in
                  ,  "q"    : self._out
                  , 'vdd'   : self._vdd
                  , 'vss'   : self._vss
                  }
         )
\end{verbatim}
\end{itemize}