* New: In VLSISAPD, in Configuration, add a new priority level UserFile
to distinguish between the system configuration files and the user's
configuration files (which take precedence).
* New: In Hurricane, in Script (Python), improve the API to be able
to support Chams (and remove the duplicate capability from it).
Add separate functions to perform the initialize/run(s)/finalize
cycle step by step.
* Change: In CRL Core, rename real technology <hcmos9> to <hcmos9gp>,
it's offcial name from CMP/ST. This is the 130nm.
Move the reading of the symbolic & real technologies names from
coriolisInit.py to helpers.__init__.py, to be shared with
chamsInit.py.
To avoid a clash of names inside of helpers, the two variables
of techno.py are renamed "symbolicTechnology" and "realTechnology".
Move python init system from crlcore/src/crlcore to crlcore/python.
* New: In CRL Core, In Utilities, add site-packages/pharos to the
PYTHONPATH.
* Change: In Kite, move python init system from kite/src/init to
kite/python.
* New: In Hurricane, in DebugSession, add a new method to activate the
trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
the flattening of the clock net(s). For more safety perform the
DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
if some cells are already placed. Typically the buffers of a clock
tree.
Pass the correct orienation to row_compatible_orientation().
Do not try to add feeds in the ISPD05 benchmarks. For now the
benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
to be routed as an ordinary signal when the clock tree is not
used.
* New: In Kite, in BuildPowerRails, management & detection for the
pre-routed clock.
In KiteEngine constructor, early initialization of the blockage
net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
configuration parameter 'clockTree.placerEngine' to select between
Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
in the vertical layer to prevent the router to use the vertical
tracks in under the prower lines (for example, blockage in M3
with power line M5).
In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
signals and *not* the power pad.
Add more meaningful error messages if a pad global signal is
not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
that is *from the bottom of the cell AB* (not from 'zero').
* New: In Bootstrap, added support for RHEL7 in ccb.py & coriolisEnv.py.
In coriolisEnv.py, under RHEL6, directly launch a shell under
devtoolset-2 (do not put it in .bashrc).
* Change: All tools, compliance with Clang 3.2.
- Call using namespace std *after* at least one include of std has
been used.
- In Utilities.h define both const and non-cont overload for operator<<
of mstream (this was the true cause of the Banner display problem).
- No longer use defaults arguments in templates, instead create two
separated overloads.
- Put template static attributes allocation outside of namespaces
(this one I'm not sure how to justify).
- Protect by NDEBUG variables that are only needed in assert().
- In PyInterval getUnion() & getIntersection() we where silently
overwriting the "self" object (interval).
- In Mauka, *do no* overload _postCreate() and add an argument, breaks
the virtual function mechanism. Rename it into _maukaPostCreate().
Idem for SubRow().
- In Katabatic::GCell(), invalidate() overload a Go funtion but is
used for different purpose at this level. Rename it invalidateCt()
(invalidate *ConTents*).
- Miscellaneous small cleanup.
* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
Finally get rid of the demonic code from Wu Yifei...
* New: In Isobar, added encapsulation of Interval (don't know how have
forgotten it for so long).
* Change: In Isobar, In PyLayer, new PyLink_LayerDerived() function to
create/link the C++ object to the correct derived class and not the
base one (PyLayer) which then prevent to use the specialized methods.
Must replace PyLink_Layer() througout all the code.
* Change: In Isobar, in PyPoint the "setX()" & "setY()" methods where
still capitalized.
* Change: In Isobar, in PyQuery, complete the exportation of the C++
interface. remove the code belonging to a more "boost" way of
building the Python interface (will do that in a far future).
* New: In CRL Core, In PyAllianceFramework, export isPad() method.
* Change: In Unicorn, in unicornInit.py, protect the loading of each
single plugin by a "try" / "except" clause to the failing of one
plugins do not stop the loading of the next one.
Pass the same dictionnary argument to unicornHook() as for
ScripMain(), this is more uniform this way.
* New: In Cumulus, complete replacement of the chip placement scripts
from Wu Yifei (at last!). The clock-tree integration is still to
be done.
________________________________________________________________________
* New: In CRL Core, in PyCellGauge, add the missing methods.
* Bug: In Isobar, PyOccurrence_create(), the HTRY/HCATCH block was not
enclosing the constructor of Occurrence, which can throw exceptions.
When an exception was thown the Python interpreter just terminate
with the cryptic message:
"Fatal Python error: Py_EndInterpreter: thread still has a frame"
Reminder to myself: when such a message occurs, it means that the
interpreter did encounter a problem, but it's related to the isobar
interface.
In CRL Core, the layout of the files under "/coriolis2/etc" changes.
Instead of having them directly under "etc", they are now replicated,
in subdirectories. Each subdirectory having the name of the associated
symbolic or real technology (they are kept separated). We have, for
now:
* etc/cmos/ : symbolic, the Alliance original one.
* etc/vsc200/ : symbolic, for G. Petley vsclib.
* etc/hcmos9/ : real, generic fake (130nm).
To tell which pair (symbolic,real) technologies must be used we create
a *second* (sigh) configuration file "coriolis2_techno.conf", and it's
hidden counterpart in the user's account, to set it up. It needs to be
separate because it is read as early as possible and select which set
of configuration files would be read.
Also add support up to METAL8 and POLY2 in CRL core and it's Alliance
parser/drivers.
Cleanup:
* Cleanup: In <vlsisapd/src/bookshelf>, remove unused file Bookshelf.cpp
(may have been a parser once upon a time).
* Cleanup: In <hurricane>, in Cell::flattenNets() use flags instead of
booleans to be more readable. Allow occurrence placement checking.
* New: In <crlcore> add Python wrapper for the Ispd05 loader.
* New: In <unicorn> add option for direct loading of ISPD05 designs.
* Bug: In <hurricane/src/viewer>, RecordModel must emit
layoutAboutToBeChanged() before changing the record contents (and
layoutChanged() afterwards).
Update to Qt 5:
* Change: Now requires at least cmake 2.8.9.
* Change: CMakeLists.txt needs small changes. Qt modules must be found
one by one (Core, Gui, Widgets). Must add "set(CMAKE_AUTOMOC ON)"
in the top file and replace "qt4" prefix in macros by "qt5".
Added simpler macro "setup_qt()" in FindBootstrap.cmake.
* Change: No longer need to include <QGtkStyle> is is choosen by default
according to the current desktop environment.
* Change: In <hurricane>, In HApplication, launch ExceptionWidget when
a std::exception is catched instead of silently discarting it.
New placer Tool: Etesian
* New: <etesian> analytical placer. Encapsulate Coloquinte from
Gabriel Gouvine.
* New: in <documentation>, add stub demonstration ToolEngine <smurf>.
Needs to be commented.
Miscellaneous:
* New: in <boostrap> and <unicorn>, added support for Etesian, the new
analytic placer. The tool itself will be added in the next commit.
* Bug: in <CellWidget>, when shifting the display buffer, we no longer
can copy the buffer on itself (we should never have). Now go through
a temporary one (PlaneId::AutoCopy) which is added to the
DrawingPlanes. Affect "goLeft()" and "goUp()".
* Bug: In <CellWidget>, remove the WA_PaintOnScreen flag/attribute.
When it's on, no PaintEvent is transmitted to the CellWidget
when it's the central widget of the <CellViewer> (QMainWindow).
It's something I still don't understand from the doc of Qt.
* Change: In <AreaCommand>, use the PlaneId enumeration instead of a
anonymous numerical index.
* Change: In <HApplication>, no longer catch and silently discard
standartd exceptions but launch the ExceptionWidget...
Suppress the now deprecated constructor with "Type" argument.
* Change: In <SelectionModel>, the "reset()" method is deprecated in
Qt5, instead enclose the "clear()" by a "beginResetModel()" and
"endResetModel()" pair.
* New: In <crlcore>, add support for ISPD05 benchmarks (in Bookshelf
format). Forked from ISPD04 and not finished yet.
* Change: In <Mauka>, distinguish the Action string identifier from
<Etesian>
* New: In <unicorn>, add entry for ISPD05 loader. Add entry for
<Etesian> analytic placer.
Details:
* New: in <bootstrap>: add support for devtoolset-2 in ccb. Run the
cmake commands through 'scl', set shell environment variables
BOOST_INCLUDEDIR & BOOST_LIBRARYDIR and disable the default
system path search.
* Change: In various flex scanners add the %nounput to suppress
compiler warnings.
* Change: Little cleanup for g++ 4.8.1 as it's more strict.
* Change: In various top CMakeLists.txt, suppress extraneous '/'
after DESTDIR.
- New: In Environment, adds a method getLIBRARYPath() to directly access the
path of an element in the SearchPath. Also added to the Python interface.
This is a quick alternative to fully export SearchPath and it's element
into the Python interface.
- New: Added FreeBSD/Ubuntu patches from Otacilio De Araujo
(<otaciliodearaujo@gmail.com>).
* ./crlcore:
- New: In Utilities, cbug stream to separate all the scary messages
from Kite/Katabatic and maybe others.
- New: In stratus1.conf, adds default settings previously in st_config.
- New: Moves Python configuration helpers from under /etc/coriolis2
into PYTHON_SITE_PACKAGES/crlcore. Adapt Utilities so coriolisInit.py
is now searched in that directory. This way only true configuration
files remains under /etc/coriolis2
- Change: In helpers/__init__.py, do not try to guess the sysConfDir
when not run through coriolisInit.py. This is done by exploring the
call stack with traceback.
- Change: In ApDriver, when a physical view is driven, update the flag
in the catalog state telling that this view is present. This is far
from satisfactory as this flag should be set as soon as any physical
component is created.
- A complete sweep of cleanup to suppress allmost all compiler warnings.
* ./crlcore:
- New: Extented Python support for all objects needed to configure Coriolis.
- New: Configuration files and load helpers completly written in Python.
An XML emulation mode is still avalaible.
- New: UsersGuide, as a replacement for README, written in ReST.
- New: Start of Doxygen documentation (mostly for documenting the initialisation
objects & methods).
- Change: New problem identified with the Python modules: each module seems
to be built as a complete binary, so all the static C++ initializers are
allocated in each module. In particular the C++ tree inheritance is built
for *each* module so we cannot longer uses the typeid() comparisons
across modules... It was used by boost::program_options to perform is
casts with boost::any and was starting throwing exceptions because of
bad casts. program_option was first initialized in "configuration"
first included by PyViewer then in PyCRL (see Utilities.cpp).
A first solution is to re-order the import of Python modules in
stratus1/st_model so that CRL is imported first.
The second is to not not link "configuration" with boost::program_option
as only the binary vlsisapd-conf-editor needs it.
That is a serious problem of which we must be aware and can cause further
strange behaviors.
Debug code used to diagnostic has been kept commented in the sources a
it may be needed again :-(
This behavior do not affect our singletons because they are part of
dynamic libraries that seems to be correctly shared between the various
Python modules.
* ./crlcore:
- In PyCRL, module method "getAllianceFramework()" moved as static object
method "get()" of AllianceFramework. Object AllianceFramework added
to module CRL.
- Bug: target_link_libraries() must be put back for OSX Snow Leopard
(doesn't seems to affect Leopard). As I do not have an OSX under
my hand it's untested and is likely to fail at that point.
* ./crlcore:
- New: PyCatalog & PyCatalogState python wrappers, mainly to have constants
values for stratus1 parsers/drivers.
Jean-Paul Chaput
Damien Dupuis