* Bug: In Interval::intersect(), bad condition check in strict mode.
* Change: In Occurrence::operator<(), change the sorting criterions
so that the ones with no paths are "lower", then the one with
no entities, then compare entities Id then Path hashes.
* Change: In Occurrence::getCompactString(), to be more readable,
suppress leading and ending "<>".
* Change: In IntervalTree, now use an IntervalDataCompare to control
the ordering of the nodes inside the tree. This may be needed
when IntervalData is build upon a pointer, we don't want to
sort on pointer values (non deterministic) .
* Bug: In IntervalTree::postRemove(), there was an incorrect computation
of the updated childsVMax.
* Bug: In IntervalTree::beginOverlaps(), miscalculated leftmost
interval overlapping.
* Bug: In RbTree::remove(), when exchanging the removed node for a
leaf, fully swap the nodes contents, was incompletly copied before.
* New: In CellWidget, add new slots selectSet(OccurrenceSet&) and
unselectSet(OccurrenceSet&), to be able to select/unselected sets
of Occurrence (for use by TabEquipotentials).
* Change: In EtesianEngine, no more need to remove leading/ending "<>".
* New: In Tramontana, use a Query to find all the Occurrence under
an area. Previously we were using Cell::getOccurrencesUnder()
which *do not* return the components in instances, so we would
have been unable to find trans-hierarchical shorts circuits.
* New: In tramontana, now use a Relation to tag all the components
belonging to an Equipotential.
* Change: In Equipotential, store everything under the form of
Occurrence, instead of Components. Due to the way the Occurrences
are sorted, the one holding Components should be firts.
* New: In NetBuilderHybridVH::_do_1G_xM1_1PinM1(), added configuration
to manage pins on the north/south sides for VH,2RL.
* Bug: In NetBuilderHybridVH::doRp_xG_xM1_xM3(), correct misplaced
vertical creation (buildind invalid topologies).
* New: EtesianEngine::toColoquinte(), display histograms of the cells
widths (in pitch) before and after bloating to get a better feeling
of the behavior.
* New: In EtesianEngine, add support for track avoidance. Portions of
tracks to avoid are specified by a Box, which should flat and on
the axis of the request track. This feature is used by the H-Tree
to clear the vertical tracks under the tree from any terminal.
* New: In Etesian::Area, Slice and SubSlice, add support for track
avoidance. Exported to the Python wrapper.
* New: SubSlice::getUsedVTracks() to get a set of tracks blocked by
the cell.
* New: SubSlice::trackAvoid(), shift left/rigth the cell under the
requested vertical track. Try only to move the cell under the
track and not it's neighbor, so it assume that there is sufficient
space left or right of the cell.
* Bug: In cumulus/plugins.block.configuration.BlockConf, the Cfg
parameters may be read too early from the Cfg space into the
various sub-conf objects (like FeedsConf). Delay the reading
of the parameters in a _postInit() functions.
Modify Block and CoreToChip to call _postInit().
* New: In cumulus/plugins.block.configuration.BlockConf._loadRoutingGauge,
allow the cell gauge name to differ from the routing gauge name.
* New: In cumulus/plugins.block.configuration.FeedsConf, allow to
select the default feed to be used with 'etesian.defaultFeed'
parameter.
* New: In cumulus/plugins.block.spares.BufferPool, allow to control
whether or not we want tie to either side of the pool.
(for latch up).
* New: In cumulus/plugins.block.HTree._connectLeaf(), add support
for track avoidance.
* Bug: In cumulus/plugins.block.HTree._connectLeaf(), the TL2 contact,
the one on the *top* auxiliary buffer seemed to have been badly
positioned until now (too low, not using tl2Y).
This is strange because it should have caused disconnections,
but I didn't see it in the wiring and the regressions tests didn't
flag anything wrong. Still a bit weird and worrying.
* New: In Hurricane::RoutingPad, added support if the supporting component
is a Pad. The source/target positions are computed according to the
most likely direction.
Change the _getEntityAsComponent() function into an inline template
_getEntityAs<T>().
Change the flags from an enum to static const uint32_t.
* Change: In Anabatic::Configuration, use _getEntityAs<T>.
* Change: In Anabatic::Dijkstra, use _getEntityAs<T>.
* Change: In Anabatic::NetBuilder, use _getEntityAs<T>.
* Change: In Katabatic::LoadGrByNet, use _getEntityAs<T>.
* Change: In Katana::ProtectRoutingPads, use _getEntityAs<T>.
* Change: In Bora::AnalogDistance, use _getEntityAs<T>.
* Change: In Etesian::EtesianEngine, use _getEntityAs<T>.
* Change: In EtesianEngine::toColoquinte(), not only compute the ratio
of DFF versus the total number of gates, but also the ratio in
term of area. As the DFF are usually very big cells compare to
combinatorial one, the direct gate ratio could be misleading as
to the "weight" of those cell in the design.
* Change: In EtesianEngine::_postCreate(), issue a warning if the list of
feeds is empy (configuration: "cfg.etesian.feedNames").
* New: Add a FeedCeels::getFeedByWidth() method to get feeds by their
width in DbU::Unit and not only pitches.
* Change: In Placement::Slice::fillHole(), invert the tie filling and
feeds filling stage. Now we first try to fill the row hole with
feeds, using the widest first, and if they are not configured or
too wide, use the tie.
As the tie *should* also be integrated in the feed list, we may
suppress altogether the fallback tie filling step. Keep it for now.
* Change: In Placement::slice::createDiodeUnder(), the inserted diode
*may* be smaller than the feed it replace. So, in this case, add
a complementary feed to fill the gap.
NOTE 1: Out of lazyness, we add only *one* complementary filler
cell. So there *must* be one of a width wich correspond
exactly to the difference between the original feed and
the diode. Otherwise, gap will remains.
NOTE 2: With wider feed cells, they may cross the GCell border.
But we must insert the diode under the GCell, otherwise
the global routing will be defective. So, for now, reject
feeds that cross the boundary. Must be done more smartly
by inserting the diode over the left or right side of
the feed.
* Bug: In CRL::MeasureSet::toStringHeaders(), check and issue a warning
if a measure label ends with a "." (dot).
* Change: In CRL::ToolEngine::getMeasure(), return the data measure
by pointer instead of by reference (easier to manipulate afterwards).
* New: In EtesianEngine::place(), add the placement runtime (under label
"placeT") to the measure set.
* New: In KatanaEngine::dumpMeasures(), add the Etesian runtime to the
set of measures.
* New: Python/C++ API level:
* Write a new C++/template wrapper to get rid of boost::python
* The int & long Python type are now merged. So a C/C++ level,
it became "PyLong_X" (remove "PyInt_X") and at Python code
level, it became "int" (remove "long").
* Change: VLSISAPD finally defunct.
* Configuration is now integrated as a Hurricane component,
makes use of the new C++/template wrapper.
* vlsisapd is now defunct. Keep it in the source for now as
some remaining non essential code may have to be ported in
the future.
* Note: Python code (copy of the migration howto):
* New print function syntax print().
* Changed "dict.has_key(k)" for "k" in dict.
* Changed "except Exception, e" for "except Exception as e".
* The division "/" is now the floating point division, even if
both operand are integers. So 3/2 now gives 1.5 and no longer 1.
The integer division is now "//" : 1 = 3//2. So have to carefully
review the code to update. Most of the time we want to use "//".
We must never change to float for long that, in fact, represents
DbU (exposed as Python int type).
* execfile() must be replaced by exec(open("file").read()).
* iter().__next__() becomes iter(x).__next__().
* __getslice__() has been removed, integrated to __getitem__().
* The formating used for str(type(o)) has changed, so In Stratus,
have to update them ("<class 'MyClass'>" instead of "MyClass").
* the "types" module no longer supply values for default types
like str (types.StringType) or list (types.StringType).
Must use "isinstance()" where they were occuring.
* Remove the 'L' to indicate "long integer" (like "12L"), now
all Python integer are long.
* Change in bootstrap:
* Ported Coriolis builder (ccb) to Python3.
* Ported Coriolis socInstaller.py to Python3.
* Note: In PyQt4+Python3, QVariant no longer exists. Use None or
directly convert using the python syntax: bool(x), int(x), ...
By default, it is a string (str).
* Note: PyQt4 bindings & Python3 under SL7.
* In order to compile user's must upgrade to my own rebuild of
PyQt 4 & 5 bindings 4.19.21-1.el7.soc.
* Bug: In cumulus/plugins.block.htree.HTree.splitNet(), set the root
buffer of the H-Tree to the original signal (mainly: top clock).
Strangely, it was only done when working in full chip mode.
* Change: In Etesian::Slice::fillHole(), instead of cramming the home
with tix_x0 only, put one tie at both ends and fill the rest
with fill_x0. This should help the vendor density filler to
equalze.
* New: In Etesian::Configuration, add the parameter:
"etesian.tieName" (for tix_x0) as it now separate from the simple
filler cells.
The H-Tree support is now allowed for any net, not only the clocks and
not only top-level nets. This allow to better management of the LS180
internal clock signal.
* New: In Cell::flattenNets(Instance*,set<string>,uint64_t) new overload
of the function to allow the user to select nets that will *not*
be flattened. This makes the NoClockFlatten flag effectively obsolete,
we keep it for backward compatibility.
The net names can be of non top level ones. In that case, they must
use the name an HyperNet will get (the Occurrence name). For example:
"instance1.instance2.deep_net_name".
* New: In PyCell, update the wrapper for the new parameter of flattenNets(),
new utility function pyListToStringSet() to translate a Python list into
a C++ set of names.
* New: In EtesianEngine, add support for a list of nets to be excluded
from the flattening procedure. Those excluded nets will also be
excludeds from the Coloquinte nets *and* HFNS synthesis, as they
are likely to be manageds by a H-Tree.
* Change: In AnabaticEngine::_loadGrByNet(), now also skip nets that are
flagged as manually detailed route.
* New: In AnabaticEngine::antennaProtect(), do not try to insert diodes
on nets that are already fixed or detaled route. This replace the
clock exclusion.
* New: In cumulus/plugins.{block,htree,chip}, replace the concept
of clock-tree by the more generic H-Tree. That is, we can ask the P&R
to create H-Tree on any net of the design, not only the ones matcheds
as clock. The net does not even need to be top-level.
This is to manage the PLL internal clock generated by the PLL in
the LS180 chip.
Start to change all reference to "clock" into "H-Tree".
* Bug: In cumulus/plugins.chip.powerplanes.Builder._connectHTree(),
there was an inversion of the H & V routing gauges to compute the
track into which put the H-Tree center to corona edge wiring.
This was causing tracks to be used twice, seen in the ao68000 test
bench.
Split "antennaMaxWL" into :
* "etesian.antennaGateMaxWL" : max length *without* any diode.
* "etesian.antennaDiodeMaxWL" : max length that *one* diode can support.
* In Etesian::Slice::createDiodeUnder(), delete the Instance *after*
removing the tile referring it. This was working, unless we
active the debug mode which tries to print the Tile's instance.
* In EtesianEngine::place(), no longer call toHurricane() at the
end of the placement. Must now be done as a separate step.
Exported to Python interface.
This fix is related to the spare buffer removal memory
corruption
* New: In AutoSegment::getExtensionCap(), when a routing layer has a
minimal area defined, compute the minimal wire length (given it's
width). Then, for segments identified as "MiddleStack" (local
with turns at each end towards opposite layers), if their length
is below minimal, return a longer extention cap.
This may be optimized because with this, the segment extension
is symmetric on both side while it could be made assymetric.
* New: In EtesianEngine::flattenPower(), this is a duplication of the
KatanaEngine::PowerRails. The new paradigm is that when a Cell
is placed by etesian it's AbstractedSupply flag is set and the
creation of the abstract is taken care of at this point.
Should provide some speedup when Katana process it.
Note that we still need to keep PowerRails at Katana stage for
design that are loaded already placed (no Etesian run).
* New: In EtesianEngine::setPlaceArea(), as the slice spin is imposed
on us by Coloquinte, the bottom slice of the place area *must*
be on a ID oriented slice, that is an even one, relative to the
fully placed area.
* Bug: In EtesianEngine, remove the slice spin detection. The spin
is imposed on us by Coloquinte which always place the bottom
row in ID orientation.
Code should be completly removed in the future, along with
the obsolete AddFeeds (replaced by Placement).
* New: In EtesianEngine, add a "placedArea" attribute to restrict the
placement area to a part only of the whole abutement box. This a
way to exclude some area containing *big* hard block.
The placer terribly slow down when tring to "push aside" cells
from the area taken by the block.
This will be also used to restrict the clock tree covered area.
It is far from optimal but will do for now.
NOTE: The placeArea must be expressed in the coordinate system of
the sub-block to be placed, if one has been defined.
* Change: In EtesianEngine::globalPlace(), disable the call to
antennaProtect(). First reason is that, after all, Coloquinte
do not handle so well the resizing of the cells "on the fly",
it overspill the boundaries sometimes. Second reason is that
as we cannot know the routing tree at this stage, we will not
be able to choose the correct points for diode insertions.
We only have a Steiner tree wich may not be the same as a
density driven Dijkstra.
* Change: In Etesian::Area, the Occurrence to the Instances where
not stored in a uniform way. Some where starting from the
placed sub-block, some where starting from the top level
(corona), making their processing (and remembering it) tricky.
Now, they are all expressed from the top cell (corona).
The coordinate system is now systematically the one of the
top block (*not* the block).
Create various overloaded functions EtesianEngine::toCell()
and EtesianEngine::toBlock() to ease Occurrence & coordinate
translations.
* New: In Etesian::Slice::createDiodeUnder(), add a X position hint.
Search is done by going through the whole slice range and
minimizing the distance to the hint. If it starts to be too
slow, we may optimize.
* Bug: In EtesianEngine::toColoquinte(), the placement of the top
level external pins was not taken into account (this at last
explain their weird positioning).
* New: AnabaticEngine::antennaProtect(), new algorithm to avoid
antenna effect. This step must be done *after* global routing
and *before* detailed routing. This way we have access to the
real routing and can mend it (along with the netlist) to
insert diodes at the rigth points.
From the global routing we build clusters (DiodeCluster) of
RoutingPads connected through a set of wire whose total length
is below the antenna effect threshold. Long wires connecting the
clusters are also tagged because we need to put a diode between
them and the first RoutingPad of the cluster. This is to avoid
a long METAL2 wire connecting to the RoutingPad before the diode is
connected through METAL3 (in case of misalignment).
This protection is not even enough. For *very long* wires, we
needs to put *more* than one diode (this is to be implemented).
* New: In Etesian::Configuration add new parameters for antenna
effect management:
* "etesian.diodeName" : the name of the diode cell.
* "etesian.antennaMaxwl" : maximum length above which antenna
effect can occur. Must be the maximum for all the normal
routing layers.
* "etesian.antennaInsertThreshold" : during the placement steps,
threshold for linear disruption at which we will look for
the RSMT and insert diodes.
* New: In EtesianEngine::antennaProtect(), at a designated point
in the placement iteratives step, when the spreading starts to
be significant enough estimate the RSMT length and add a diode
if need be. The diode will be put side by side with the driver
cell. This is done by enlarging the driver cell of the diode
width.
* New: In EtesianEngine::_updatePlacement(), in the final stage,
modify the netlist to connect the diode. The diode will be
put on the side of the cell closest to the driver. This may
alow to make the connexion directly in METAL1 in the future.
* Change: In etesian/Placement.cpp, make the whole placement
structure a persistent attribute of the EtesianEngine so
it can be used afterwards.
Add a post-placement diode insertion feature. Finally
unused as they are added on the fly during placement.
In the Area, add data about the diode tie in the TieLut.
* Change: Add EtesianEnginea::clearColoquinte(), to keep the
post-placement structure while purging the Coloquinte one.
* Change: In cumulus/plugins.block.block, keep the Etesian engine
until the whole P&R is done, so we potentially can exploit
the post-placement datas.
* Bug: In cumulus/plugins.chip.power.GoCb(), for the METAL1 power
and ground wires coming from the standard cell, it was assumed
they where made of Horizontal segments, this is not the case
in FlexLib... So force to consider the plane as Horizontal when
we are processing that plane.
Better solution should be to use Horizontals...
* New: In Etesian::Configuration, added "etesian.lacthUpDistance" to
control tie cells insertion (for polarization contacts).
* New: Etesian/Placement as a complete replacement for FeedCells.
Rebuild the complete slicing structure of the placement to
serve as a building block for post-placement changes under
Coriolis. Currently used to regularly insert body ties.
This is not optimal as we displace cells in each slice in
a non-coordinated manner.
* New: In cumulus/plugins/block.configuration.FeedsConf, register
the "etesian.latchUpDistance" parameter. Provides the tie width.
* New: In cumulus/plugins.block.spares, add ties around the buffer
pool block and "cap ties" at both end of each slice.
Jean-Paul Chaput
Gabriel Gouvine