Commit Graph

39 Commits

Author SHA1 Message Date
Robert Taylor 68a3695780 Remove old generated files that clash on case-insensitive file systems 2022-11-15 11:51:43 +00:00
Jean-Paul Chaput c737d5bd0c Port to Python3 capacitors & resistors generators.
Main list of ports:

* Replace deprecated operator '<>' by '!='.
* To check if a list is empty, do not compare to [], but check it's
  length instead.
* Do not make a class inherit indirectly twice from the same base class.
* Hurricane physical object constructors uses DbU::Unit as arguments,
  seen as int in Python, so they will not match float. Unfortunately
  the calculation often gives float. So explicitely cast them into
  int. This is due to a change of behavior in Python. Now, 3/2
  gives 1.5 (float). To get the previous one use: 3/2 -> 1 (int).
* dict.keys()[0] no longer work, instead use list(dict.keys())[0].
2022-07-13 11:20:55 +02:00
Jean-Paul Chaput 302accfbb1 Update documentation (by mistake, nothing new). 2021-11-21 23:40:40 +01:00
Las Safin 6e5c03434a Adapt Nix code to Python 3 switch.
This commit also reduces the diff by not removing
some (unnecessary) error handling.
2021-10-26 20:10:59 +00:00
Myrtle Shah 2d24efdb6c Bump minimum CMake version
The CMake version set was so old that obsolete policies were being
enabled and breaking FindPython. 2.8 should still be old enough not to
cause problems for any current users.

Signed-off-by: Myrtle Shah <gatecat@chipflow.io>
2021-10-15 13:38:38 +01:00
Jean-Paul Chaput 0e63168802 Regenerated whole doc (by mistake)... 2021-10-01 21:36:45 +02:00
Jean-Paul Chaput 02777e127e Migration towards Python3, first stage: still based on C-Macros.
* New: Python/C++ API level:
  * Write a new C++/template wrapper to get rid of boost::python
  * The int & long Python type are now merged. So a C/C++ level,
    it became "PyLong_X" (remove "PyInt_X") and at Python code
    level, it became "int" (remove "long").
* Change: VLSISAPD finally defunct.
  * Configuration is now integrated as a Hurricane component,
    makes use of the new C++/template wrapper.
  * vlsisapd is now defunct. Keep it in the source for now as
    some remaining non essential code may have to be ported in
    the future.
* Note: Python code (copy of the migration howto):
  * New print function syntax print().
  * Changed "dict.has_key(k)" for "k" in dict.
  * Changed "except Exception, e" for "except Exception as e".
  * The division "/" is now the floating point division, even if
    both operand are integers. So 3/2 now gives 1.5 and no longer 1.
    The integer division is now "//" : 1 = 3//2. So have to carefully
    review the code to update. Most of the time we want to use "//".
    We must never change to float for long that, in fact, represents
    DbU (exposed as Python int type).
  * execfile() must be replaced by exec(open("file").read()).
  * iter().__next__() becomes iter(x).__next__().
  * __getslice__() has been removed, integrated to __getitem__().
  * The formating used for str(type(o)) has changed, so In Stratus,
    have to update them ("<class 'MyClass'>" instead of "MyClass").
  * the "types" module no longer supply values for default types
    like str (types.StringType) or list (types.StringType).
    Must use "isinstance()" where they were occuring.
  * Remove the 'L' to indicate "long integer" (like "12L"), now
    all Python integer are long.
* Change in bootstrap:
  * Ported Coriolis builder (ccb) to Python3.
  * Ported Coriolis socInstaller.py to Python3.
  * Note: In PyQt4+Python3, QVariant no longer exists. Use None or
    directly convert using the python syntax: bool(x), int(x), ...
    By default, it is a string (str).
* Note: PyQt4 bindings & Python3 under SL7.
  * In order to compile user's must upgrade to my own rebuild of
    PyQt 4 & 5 bindings 4.19.21-1.el7.soc.
* Bug: In cumulus/plugins.block.htree.HTree.splitNet(), set the root
    buffer of the H-Tree to the original signal (mainly: top clock).
      Strangely, it was only done when working in full chip mode.
2021-09-19 19:41:24 +02:00
Las Safin f20ffa02e9
Get oroshi working 2021-09-01 11:13:49 +00:00
Jean-Paul Chaput f1668cec5f Disable BFD support by default.
* Change: In <tool>/CMakeLists.txt, add an USE_LIBBFD option to
    enable the link against the BFD library. Latest versions seems
    to have changed their API.
* Change: In bootstrap/ccp.by & builder/Builder.py, add an option
    "--bfd" (and self._bfd) to enable BFD support.
2021-07-17 13:01:19 +02:00
Jean-Paul Chaput c6e5583233 Documentation cleanup & rebuild.
* Change: In documentation/build.py, more PEP8 & Python 3 future compliance.
    Correct copy of the tools HTML docs on my laptop, to have a full
    offline copy of the doc.
* New: In documentation/contents/pages/check-toolkit, duplicate the doc
    from alliance-check-toolkit README. Seems it has been inadvertently
    removed at some point (?). Have to be careful to maintain in synch
    with the toolkit.
* Change: <tool>/doc/*/SoC.css, use Roboto fonts when availables.
* Update: Commit the whole pre-generated docs (Doxygen, Pelican).
2020-11-12 14:22:31 +01:00
Jean-Paul Chaput 134044ee99 Bad indentation in oroshi/dtr.py (from latest merge). 2020-07-22 17:26:28 +02:00
Marie-Minerve Louërat 7ae37a2ac3 Merge branch 'devel' of gitlab.lip6.fr:vlsi-eda/coriolis into devel
Conflicts:
	oroshi/python/dtr.py
2020-07-22 15:05:00 +02:00
Marie-Minerve Louërat be0255c27b Merge branch 'devel' of gitlab.lip6.fr:vlsi-eda/coriolis into devel
Conflicts:
	oroshi/python/dtr.py
2020-07-22 15:00:19 +02:00
Jean-Paul Chaput 17ecfd823b Enhanced techno rule support. Inspector support bug fix.
* Bug: In Hurricane/Commons.h, modify the getRecord<>() templates so
    that for both vector<Element> and vector<Element*>, the individual
    record created for each element are donne with pointers. That is,
    for the vector<Element> case, we take a pointer.
      As a general policy, except for the POD types, always use pointers
    or references to data in the records/inspector. Never uses values
    that can call the copy constructor.
      Suppress INSPECTOR_PV_SUPPORT() macro, keep only
    INSPECTOR_PR_SUPPORT().
      Provide value support only for getString<>() template.
      This value & copy constructor problem was causing a crash when
    trying to inspect Hurricane::AnalogCellExtension.
* New: In Hurricane::Technology, change the API of the PhysicalRule,
    now we can only create/get PhysicalRule, but setting the value of
    the rule itself must be done on the rule.
      Enhance PhysicalRule to provide for stepped rules, non isotropic
    and ratio rules.
      Merge TwoLayersPhysicalrule in PhysicalRule, much simpler to
    suppress the management of derived classes. That means that we
    loose a little memory as some fields are mutually exclusive.
    Not a problem considering that there will not be so many of thoses
    objects.
* New: In CRL/helpers.analogtechno.py, enhanced DTR support for rules
    like:
      ('minSpacing'  , 'metal1', ((0.4,20.0), (0.8,1000.0)), Length, 'REF.1')
      ('minEnclosure', 'metal1', 'cut1', (0.2,0.3)         , Length, 'REF.2')
      ('minDensity'  , 'metal1', 0.30                      , Unit  , 'REF.3')
      The DTR parser has been updated, but not the oroshi.dtr Rule
    cache for analog components. Given a rule name, the value used
    will be the horizontal one of the first step.
* Change: In hurricane/doc/hurricane, re-generate the documentation
    with updated support for Technology & PhysicalRule.
2020-07-21 11:22:04 +02:00
Marie-Minerve Louërat e7bf8022f7 Ajout de règles 2020-07-09 17:05:57 +02:00
Jean-Paul Chaput 010fc79f4f Added rule minWidth_nWell to oroshi rule loader. 2020-06-30 14:54:42 +02:00
Jean-Paul Chaput 4483766f34 Enabled support for track positionning in analog Transistor devices.
* New: In Analog, new Parameter derived class "StringParameter",
    to support strings. Also added to the Python interface.
* New: In Analog::Transistor, added StringParameters for specifying
    track positions. They are named "G.t", "S.t", "D.t" and "B.t".
* New: In Oroshi/wip_transistor.py, now read the track positionning
    devices parameters.
* New: In Karakaze/AnalogDesign.doDevice(), read an optional 14th
    parameter holding the track positions (example in ADC-SAR).
2020-05-11 15:59:45 +02:00
Jean-Paul Chaput bd4ace7cc8 Full update of the generated documentation. 2020-04-27 14:14:03 +02:00
Jean-Paul Chaput 7e7e7170ba Improve symmetry management for analog designs.
* Bug: In Hurricane::NetRoutingState::getSymValue(), outrageously bad
    computation of the symmetric coordinate when the value was superior
    to the axis... (shame on me).
* Change: In Anabatic::Disjkstra::load(), for symmetrically paired nets,
    check that the axis of symmetry is *outside* the searchArea.
      Otherwise, the two mirrored areas overlaps and the two nets will
    unescapably be on top of each other. Issue a warning but still
    continue.
* Change: In Anabatic::Vertex::isRestricted(), allow perpandicular
    wire to go through struts or thin (less than one routing pitch)
    node. May have to recheck in the future and restrict to struts
    only.
* Bug: In Bora::HVSlicingNode::updateSymNetAxis(), rescursive call in
    child node was not systematically done (bad curly brace position).
      Also checks that symmetries are not empty before accessing the
    front element (one less core dump).
2020-04-10 12:15:23 +02:00
Jean-Paul Chaput a50b6ce317 More PEP8 compliant Python code. Start rewrite Python/C++ wrappers.
* Change: In CRL/helpers, cumulus/plugins, oroshi & karakaze,
    Move towards more Python PEP8 compliance:
      * All indentations sets to 4 spaces (in progress).
      * In plugins, remove messages about software collections
        and RHEL (too many case could wrongly lead to that).
	Instead systematically uses "helpers.io.catch()".
      * Put in lowercases all modules names. Note that C++ exported
        modules *keep* their Capitalized names (to preserve the
	identity with the C++ namespace).
      * When making import, use full path.
      * Rename the run function from "ScriptMain()" to "scriptMain()".
* Cleanup: In CRL/etc, remove obsoleted configuration files,
    the one ending in ".conf". Keep those who have not been ported
    to the new style yet.
* New: In Hurricane/src/configuration, first trial at replacing the
    C preprocessor macros by C++ templates. Applied first to configuration
    from VLSISAPD.
      This is unfinished business, just a limited demonstrator for now.
      It is installed as a separate Python library "Cfg2" which do not
    interact with the rest of Coriiolis.
      The end goal is to fully remove boost and merge VLSISAPD useful
    components directly inside Hurricane.
2020-04-08 11:24:42 +02:00
Jean-Paul Chaput e9ce33a857 Resistor integration.
* New: In Isobar::PyResistor, manage type RPOLYH and RPOLY2PH.
* Change: In Hurricane::Resistor, rename plate nets from "PIN1" and
    "PIN2" into "t1" and "t2" (try to respect uniform naming scheme).
* New: In Karakaze/AnalogDesign.py, support for reading Resistor
    parameters.
* New: In Orosshi, ResistorSnake.py imported from Mariam Tlili's work
    and associated Resistor.py to make parameter conversion.
      Currently we only uses vertical layout for resistors.
      Added METAL2 horizontal terminals for resistors.
2020-03-30 12:40:29 +02:00
Jean-Paul Chaput a12d88040a Capacitor support, at last.
* Change: In Hurricane::DbU::setGridPerLambdas(), allow the grid per
    lambda to be even. Needed when using nsxlib libraries that are
    drawn using a "half lambda" (two lambdas to get an Alliance lambda).
* New: In Oroshi/python, integrated capacitors. Modifications and
    correction from Mariam's code:
    * No need to redefine __setattr__() on CapacitorUnit.
    * Pitch horizontally & vertically (symbolic routing tracks) the
      devices.
    * Put the horizontal access tracks on the routing pitch.
    * Sets the horitontal metal2 wires as external components and
      NOT the capacitor plates themselves.
    * Makes the size (plates) of the unit capacitor a multiple of
      the foundry grid, not a floating number...
    * Correct the net ownership of horizontal tracks in
      drawHRoutingTracks().
    * Simplification & put error management directly inside of
      __isCapacitorUnitOK__().
* New: In Karakaze/python/AnalogDesign, capacitor spec now include
    the dummy parameter.
2020-03-15 17:56:09 +01:00
Mariam Tlili e2d6929fbe Merge branch 'devel' of gitlab.lip6.fr:vlsi-eda/coriolis into devel
Conflicts:
	oroshi/python/CapacitorRoutedSingle.py
        Hidden tabulations remaining
2020-03-06 17:53:01 +01:00
Mariam Tlili 7281129850 Latest Capacitor corrections by Mariam. 2020-03-06 17:48:42 +01:00
Jean-Paul Chaput 0dc98dfce3 Migrating doc from Sphinx towards Pelican.
* Change: In documentation, now generate the overall documentation using
    Pelican instead of Sphinx. This allows to have an unified approach
    between the coriolis.lip6.fr website and the local documentation.
      So we keep using "only" two doc generators: doxygen & Pelican.
2020-02-03 17:44:15 +01:00
Jean-Paul Chaput 057501a8df Capacitor & resistor integration in the Slicing Tree.
* New: In Karakaze/Oceane.py, now also read capacitor & resistors parameters.
    In AnalogDesign.readParameters(), get the capacitor parameters from
    Oceane into the "device spec" (dspec). Translate form OSI unit to
    Coriolis units (F -> pF).
* Bug: In Bora::NodeSets::create(), Capacitor matrix parameters where never
    read due to a misplaced curly brace (at the matrixRange dynamic_cast<>
    test).
* Change: In Bora/PyDSlicingNode, now check that the parameter is either
    a StepParameterRange or a MatrixParameterRange.
      Also add a check that the Instance name exists...
* Bug: In Bora::SlicingPlotWidget::updateSelectedPoint(), as we display
    only the transistor parameters in dynamic labels, do not forget to
    skip resistor and capacitor. Otherwise we end up in out of bound
    access in the vector of labels.
2020-01-23 14:07:19 +01:00
Jean-Paul Chaput 26610ba80c Fixe bad Python exception catch for C-launched scripts.
* In Hurricane::Viewer::Script::runFunction() & callFunction(), when the
    script returns NULL, do not immediately return but first check if an
    exception has been set. If so, print it *then* clear it.
      Due to not clearing the exception we where seeing one later with
    no relation to the true problem.
* In Oroshi/python/Rules.py, a bad test structure was discarting all the
    "no layer rule with physical length" in the loading process. It was
    blocked by the physical unit rule special cases.
2019-12-19 01:18:11 +01:00
Mariam Tlili f269c6b523 Merge branch 'devel' of https://www-soc.lip6.fr/git/coriolis into devel 2019-12-12 14:30:52 +01:00
Mariam Tlili f77801b3fb Added nun-unit capacitor & single routed capacitor. 2019-12-12 14:29:57 +01:00
Mariam Tlili e1389f501a First integration of Resistors (straight & snake). 2019-12-12 14:23:35 +01:00
Jean-Paul Chaput 68e45bc5ab Groudwork for routing density driven placement. Compliance with clang 5.0.1.
This commit contains two set of features that should have been commited
separately.
  1. Compliance with clang 5.0.1, tested with the RedHat collection
     llvm-toolset-7. This allow Coriolis to be compiled under Darwin (MacOS)
     with Xcode & macports. The bootstrap install system has been modificated
     accordingly.
  2. The basic support for routing density driven placement. Related
     features are:
     * Bloat property. Each Occurrence of an Instance can be individually
       bloated. This property not attached to any tool to allow the placer and
       router to share it as wanted. Nevertheless, it is defined in Etesian.
     * BloatProfile in Katana, add individual Bloat properties to Instances
       occurrences based on the East & North overflowed edges of each GCell.
     * Support in ToolEngine for a "pass number" of a tool. This pass number
       is mainly used to make "per pass" measurements. The MeasureSet system
       is improved accordingly to support multiple values of a same measure.
     * Embryo of "P&R Conductor" to perform the place & route loop until the
       design is successfully placed. May be the first brick of a Silicon
       Compiler.

* Change: In boostrap/FindBoostrap.cmake, in setup_boost(), added tag to
    the python component for macport (ex: python27).
* Change: In boostrap/build.conf, put etesian before anabatic for
    instance occurrence BloatProperty dependency.
      Added option support for the "llvm-toolset-7" collection to build
    against clang 5.0.1.
* Bug: In Hurricane::getRecord( const pair<T,U>& ), the getSlot<> templates
    for first & second arguments must be called with <const T> and <const U>
    as the pair itself is const (and not simply <T> & <U>).
* Change: In Hurricane::getSlot() temlate, only use "string" arguments and
    not const string&, simpler for template argument deduction.
* Bug: In Hurricane::AnalogCellExtension, the StandardPrivateProperty<>
    template has a static member "_name". Clang did show that the template
    for this static number has to be put inside the namespace where the
    template *is defined* (i.e. Hurricane) instead of the namespace where
    it is instanciated (i.e. Analog).
* Bug: In Isobar, Matrix_FromListOfList(), PyInt_AsPlacementStatus() must
    be put outside the C linkage back in the Isobar C++ namespace (clang).
* Bug: In Hurricane::DBo::~DBo, and derived add a throw() specification
    (clang).
* Bug: In Hurricane::RegularLayer::getEnclosure() & setEnclosure(), change
    signature so it matches the one of the base class (clang).
* Bug: In Hurricane::CellPrinter, use double brackets for initializer list
    (clang).
* Change: In Hurricane::Breakpoint, reverse the meaning of the error level.
    Only error level *lesser or equal* than the stop level will be enabled.
* Bug: In CRL/python/helpers/__init__.loadUserSettings(), must put the
    current working directory in the sys.path as in certain configuration
    it may not be included.
* Bug: In CRL::ApDriver, DumpSegments(), no longer generate segments when
    encountering a RoutingPad on a top-level Pin Occurrence. The segment
    was generated in the wrong direction, creating DRC violations on the
    "mips_core_flat" example.
* Change: In CRL::Measures, partial re-design of the measurements management.
    Now, each kind of measure can accept multiple values put in a vector.
    The index is intented to match a tool run number.
* Change: In CRL::Histogram, add support for multiple sets of datas,
    indexeds with tool run number.
* Change: In CRL::ToolEngine, add support for multiple pass number, add
    addMeasure<> templates for the various data-types.
* Change: In CRL::gdsDriver & CRL::gdsParser(), comment out unused GDS record
    name constants.
* New: Etesian::BloatProperty, property to attach to Instance occurrences
    that contains the extra number of pitch to add to the cell width.
* Bug: In AutoSegment::CompareByDepthLength, the segment length comparison
    was wrong, it was always returning true, which broke the "strick weak
    ordering" of the comparison.
      This was producing a core-dump in GCell::updateDensity() when sorting
    a vector<>. The end() iterator was being dereferenced, leading to the
    problem.
* Bug: In Katana::DataSymmetric::checkPairing(), the test for segments
    whose axis is perpandicular to the symmetry axis was wrong
    ("!=" instead of "-").
* New: In Katana/GlobalRoute, new ::selectSegments(), selectOverloadedgcells()
    and selectBloatedInstances() to automatically select segments from
    overloaded edges, overloaded GCells and bloated cells.
* Change: In KatanaEngine, return a more detailed success state, distinguish
    between global and detailed.
      Add support for multiple routing iterations.
* New: In cumulus/python/plugins/ConductorPlugin.py, embryo of routing
    driven placement.
2019-12-09 01:57:44 +01:00
Jean-Paul Chaput 85540c9a58 Added capacitor documentation in Oroshi, and generated. 2019-11-13 23:43:04 +01:00
Jean-Paul Chaput 88235dc3a4 Added Resistor support. Completed Capacitor & Resistor support in Bora.
* New: In Analog, added Analog::ResitorFamily & Analog::Resistor classes.
* New: In Analog, added inspector support for all Parameter classes.
* New: In Analog, new FloatParameter class (for resistor value).
* New: In CRL/etc/scn6m_deep_09/devices.py, added resistor device.
* New: In Oroshi, support for Resistors, stub for ResistorSnake generator.
* New: In Bora::DNodeSets, added support for Resistor devices.
* Change: In Bora::DSlicingNode, rename setNFing()/getNFing() into
    setBoxSetIndex()/getBoxSetIndex() for semantic coherency.
* New: In Karakaze/python/AnalogDesign.py, added support for Resistor.
    Change in addDevice(), the span which was only meaningful for
    transistor devices is replaced by a parameter argument.
      The parameter argument has to be consistent with the device type.
2019-11-12 02:21:03 +01:00
Jean-Paul Chaput 8035b31f27 First stage in analog capacitor integration
* Bug: In Technology::getPhysicalRule(), if the named layerdo not exists,
    throw an exception instead of silently putting a NULL pointer inside
    a rule.
* New: In Hurricane/Analog, new parameters classes for capacitor devices:
    - Analog::Matrix, a matrix of null or positives integers to encode
      capacitor matrix matching.
    - Analog::Capacities, a list of float values for all component of a
      multi-capacitor.
* New: In Hurricane::Script, add a "getFileName()" method to get the full
    path name of the Python module.
* Change: In Analog::LayoutGenerator, completly remove the logger utility
    as it is no longer used. Simply print error messages instead.
* Change: In Analog::MetaCapacitor, rename top & bottom plate 'T' & 'B'.
    Accessors renamed in "getTopPlate()" & "getBottomPlate()".
* New: In Analog::MultiCapacitor, complete rewrite. Makes use of the
    new parameters "capacities" and "matrix". Dynamically generates it's
    terminals as we do not know beforehand how many capacitors could be
    put in it.
* Bug: In isobar/PyHurricane.h, in Type object definition, do not prepend
    a "Py" to class name (so the keep the C++ name).
* Change: In CRL/etc/scn6m_deep_09/devices.py, add entry for the new
    capacitor generator.
* New: In oroshi/python/ParamsMatrix, add a "family" entry in the [0,0]
    element to distinguish between transistor, capacitor and resistor.
    (this is the matrix of values returned to the LayoutGenerator after
     device generation).
      Now have one "setGlobalParams()" function per family.
* New: In oroshi/python/Rules.py, added DTR rules needed by capacitors.
    Catch exceptions if something wrong append when we extract the rules
    from the technology.
* New: In Bora, the devices are no longer *only* transistors, so the
    possibles configurations are no longer defined only by a number of
    fingers. We must be able to support any kind of range of configuration.
      So the explicit range of number of fingers is replaced by a base
    class ParameterRange, and it's derived classes:
      - Bora::StepParameterRange, to encode the possible number of fingers
        of a transistor (the former only possibility).
      - Bora::MatrixParameterRange, to encode all the possible matching
        scheme for a capacitor. As there is no way to compress it, this
	is a vector of Matrix (from Analog).
* Change: In Bora::DSlicingNode::_place(), the ParameterRange has to be set
    on the right configuration (through the index) before being called.
      The generation parameters are taken from the active item in the
    ParameterRange.
* Change: In Bora::NodeSets::create(), iterate over the ParameterRange
    to build all the configuration. Adjustement to the routing gauge
    pitchs are moved into the DBoxSet CTOR to save a lot of code.
      Semantic change: the index in the NodeSets is now the index in
    the associated ParameterRange and no longer the number of fingers
    of a transistor.
      Check that the ParameterRange dynamic class is consitent with the
    device family.
* Change: In Bora::DBoxSet, same semantic change as for NodeSets, the
    number of finger become an index in ParameterRange.
      In DBoxSet::create(), now also perform the abutment box adjustement
    to the RoutingGauge, if possible.
* New: In Karakaze/python/AnalogDesign.py, add support for Capacitor
    devices.
2019-11-07 17:05:49 +01:00
Jean-Paul Chaput 2c73cfe76c Migrating the initialisation system to be completely Python-like.
* New: In bootstrap/coriolisEnv.py, add the "etc" directory to the
    PYTHONPATH as initialization are now Python modules.
* New: In Hurricane/analogic, first groundwork for the integration of
    PIP/MIM/MOM multi-capacitors. Add C++ and Python interface for the
    allocation matrix and the list of capacities values.
* Change: In Hurricane::RegularLayer, add a layer parameter to the
    constructor so the association between the RegularLayer and it's
    BasicLayer can readily be done.
* Change: In Hurricane::Layer, add a new getCut() accessor to get the
    cut layer in ViaLayer.
* Change: In Hurricane::DataBase::get(), the Python wrapper should no
    longer consider an error if the data-base has not been created yet.
    Just return None.
* Bug: In Isobar::PyLayer::getEnclosure() wrapper, if the overall
    enclosure is requested, pass the right parameter to the C++ function.
* Change: In AllianceFramework, make public _bindLibraries() and export
    it to the Python interface.
* Change: In AllianceFramework::create(), do not longer call bindLibraries().
    This now must be done explicitely and afterwards.
* Change: In AllianceFramework::createLibrary() and
    Environement::addSYSTEM_LIBRARY(), minor bug corrections that I don't
    recall.
* Change: In SearchPath::prepend(), set the selected index to zero and
    return it.
* Change: In CRL::System CTOR, add "etc" to the PYTHONPATH as the
    configuration files are now organized as Python modules.
* New: In PyCRL, export the CRL::System singleton, it's creation is no
    longer triggered by the one of AllianceFramework.
* New: In CRL/etc/, convert most of the configuration files into the
    Python module format. For now, keep the old ".conf", but that are no
    longer used.
      For the real technologies, we cannot keep the directory name as
    "180" or "45" as it not allowed by Python syntax, so we create "node180"
    or "node45" instead.
      Most of the helpers and coriolisInit.py are no longer used now.
    To be removed in future commits after being sure that everything
    works...
* Bug: In AutoSegment::makeDogleg(AutoContact*), the layer of the contacts
    where badly computed when one end of the original segment was attached
    to a non-preferred direction segment (mostly on terminal contacts).
      Now use the new AutoContact::updateLayer() method.
* Bug: In Dijkstra::load(), limit symetric search area only if the net
    is a symmetric one !
* Change: In Katana/python/katanaInit.py, comply with the new initialisation
    scheme.
* Change: In Unicorn/cgt.py, comply to the new inititalization scheme.
* Change: In cumulus various Python scripts remove the call to
    helpers.staticInitialization() as they are not needed now (we run in
    only *one* interpreter, so we correctly share all init).
      In plugins/__init__.py, read the new NDA directory variable.
* Bug: In cumulus/plugins/Chip.doCoronafloorplan(), self.railsNb was not
    correctly managed when there was no clock.
* Change: In cumulus/plugins/Configuration.coronaContactArray(), compute
    the viaPitch from the technology instead of the hard-coded 4.0 lambdas.
      In Configuration.loadConfiguration(), read the "ioring.py" from
    the new user's settings module.
* Bug: In stratus.dpgen_ADSB2F, gives coordinates translated into DbU to
    the XY functions.
      In st_model.Save(), use the VstUseConcat flag to get correct VST files.
      In st_net.hur_net(), when a net is POWER/GROUND or CLOCK also make it
    global.
* Change: In Oroshi/python/WIP_Transistor.py, encapsulate the generator
    inside a try/except block to get prettier error (and stop at the first).
2019-10-28 18:09:14 +01:00
Jean-Paul Chaput 0df4821806 Full update of the generated documentation for version 2.3 2019-05-27 18:49:51 +02:00
Jean-Paul Chaput 3fb746fbef Support for mixing real pads & symbolic core. Wrapper around s2r.
* Change: In Hurricane::Error constructors disable the backtrace generation.
    (*very* slow).
* Change: In Hurricane::Library::getHierarchicalname(), more compact
    naming. Remove the name of the root library.
* New: In Hurricane::Net, new type "FUSED", for component with no net.
    More efficient than having one net for each.
* Change: In CellViewer, BreakpointWidget, use Angry Birds icons.
* Change: In CellWidget::State, use the hierarchical name (cached) as key
    to the state. This allow to load two cells with the same name but from
    different libraries in the widget history.
* Change: In PyGraphics, export "isEnabled()" and "isHighDpi()" functions.
* Change: In CRL/etc/symbolic/cmos/plugin.conf, and
    CRL/etc/common/plugin.conf use the physical dimensions converters.
* Change: In CRL/etc/symbolic/cmos/technology.conf, make the GDS layer
    table coherent with the default Alliance cmos.rds.
* New: CRL/python/helpers/io.py, put ErrorMessage new implementation here,
    along with a new ErrorWidget written in PyQt4. It seems finally that
    PyQt4 can be used alongside Coriolis Qt widgets.
      New ErrorMessage.catch() static function to manage all exceptions
    in except clauses.
* Change: In CRL/python/helpers/, no longer use ErrorMessage.wrapPrint(),
    directly print it.
      Rewrite the utilities to display Python stack traces "textStacktrace()"
    and "showStacktrace()".
* Change: In CRL::AllianceFramework, shorten the names of the libraries.
* Change: In CRL::ApParser & CRL::ApDriver, more accurate translation between
    Alliance connectors (C record) and Hurricane::Pin objects. Pin are no
    longer made square but thin and oriented in the connecting direction.
      Use the new fused net for unnamed components.
* New: In CRL::GdsParser, implementation of SREF parsing, i.e. instances.
    Due to the unordered nature of the GDS stream, instances creation are
    delayed until the whole stream has been parsed and only then are they
    created.
      For the sake of reading back Alliance s2r GDS, we assume that any
    TEXT following a boundary is the Net name the boundary (component)
    belongs to.
      Create abutment box for Cells, computed from the bounding box, so
    the Hurricane QuadTree could work properly.
      Make use of the fused net for unnamed components.
* New: In Cumulus/plugins/chip, complete rewrite of the I/O pad management.
    Now we can mix real (foundry) pads and a symbolic core.
      To cleanly support the de-coupling between the real part and the
    symbolic one we introduce a new intermediary hierarchical level, the
    corona. We have now:
      Chip --> Pads + Corona --> Core.
      At chip level (and if we are using real pads) the layout is fully
    real (excepting the corona).
      The Corona contains everything that is symbolic. It has symbolic
    wires extending outward the abutment box to make contact with the
    real wires coming from the pads.
      In the pad ring we can use corners instances (or not), pad spacers
    or directly draw wires between connectors ring pads.
      Provide two flavors: placement only or full place & route.
    WARNING: If routing in a second step, *do not route* the *Chip* but
    the *Corona*.
* Change: In Cumulus/plugins/clocktree, give the modified Cell an
    additional extension of "_cts" (Clock Tree Synthesis) instead of
    "_clocked", to follow the common convention.
* New: In cumulus/plugins/S2R.py, encapsulate call to Alliance S2R and
    reload the translated Cell in the editor.
* New: In cumulus/plugins/core2chip, provide an utility to automatically
    create a chip from a core. To work this plugins must have a basic
    understanding of the pad functionalities which may differs from
    foundry to foundry. So a base class CoreToChip is created, then for
    each supported pad foundry a derived class is added. Currently we
    support AMS c35b4 and Alliance symbolic cmos.
* Bug: In Anabatic::Configuration, read the right configuration parameter
    "anabatic.topRoutinglayer" (Katana), and not the one for Katabatic...
* Change: In Unicorn/cgt.py, process the plugins in alphabetical order
    to ensure a reproductible ordering of the menus...
2019-05-22 14:34:32 +02:00
Jean-Paul Chaput fcd6d69a2f Analog integration part II. Analog place & route (slicing tree).
* Change: In Hurricane::CellWidget, set the minimal size to 350 pixels
    to fit my normal DPI secondary screen...
* Change: In Hurricane::Error(), reactivate the backtrace generation by
    default. Seriously slow down the program each time an Error is to
    be constructed.
* Bug: In Analog::Device::preCreate(), check for NULL Technology before
    attempting to use it.
* Change: In Hurricane/Analog, remove all '*Arguments*' classes and their
    Python interface. It was an obsoleted way of passing devices parameters
    to the Python layout generators (located in Oroshi). Now we just get
    them straight from the Device with the getParamter() method.
* Change: In CRL::System CTOR, add Python pathes for Oroshi & Karakaze.
* Change: In Oroshi/Python/WIP_*.py layout generator scripts, remove
    all uses of the "Arguments". Directly access the parameters through
    the device itself. Make the checkCoherency() with identical arguments
    as of layout().
* New: Bora tool that performs analog place & route. Based on a slicing
    tree representation. It is the thesis work of Eric Lao.
      Code beautyfication and some programming cleanup.
* New: Karakaze tool, provide the Python base class AnalogDesign used
    to build an analog design. Create/configure devices and assemble
    them in a slicing tree.
* Change: In Unicorn/cgt.py, display the stack trace in case of an
    ImportError exception as well as for other exceptions.
      Add Bora to the set for included tool engines.
2018-10-18 18:10:01 +02:00
Jean-Paul Chaput 3f73b9d033 Anlog integration part I. Atomic devices support (transistors).
* Change: In boostrap, remove support for Chams.
* New: In Hurricane::Technology, added support for DTR rules, UnitRule,
    PhysicalRule and TwoLayersPhysicalrule. Added devices descriptors and
    models descriptors (for Spice). Spice description is not used yet
    but kept anyway in case of future use.
* New: Hurricane::Analog whole library and it's Python interface. This
    provides support for transistors, capacitors and resistors. Only
    transistor support is fully implemented as of now.
* New: In CRL/python/coriolisInit.py, read configuration files for the
    Analog extension (analog.conf & devices.conf). Thoses are optionals
    and a simple warning is issued if not found.
      Added helpers/AnalogTechno.py DTR loading helper.
      Add analog configuration files for 180/scn6m_deep_09.
* New: Oroshi tool that provides actual layout drawing for transistors.
2018-10-01 16:52:17 +02:00