Integrate new features and bug fixes so the Arlet 6502 benchs successfully
passes real DRC with reference industrial tools. Short summary:
* Manage minimum area for VIAs in Katana::Tracks.
* Allow different wire width for wires perpandicular to the prefered
routing direction.
* StackedVIAs used in the clock tree no longer assume an uniform
routing grid (same offset & pitch all the way up).
* Some hard-coded patches in PowerRails for FlexLib.
* New: In CRL/symbolic/cmos/kite.py & cmos45/kite.py, update the
RoutingLayerGauges by adding the new PWireWidth parameter.
Always zero in case of symbolic layout (too fine tuning).
* New: In CRL::RoutingGauge, add accessor to PWireWidth parameter.
Modify the clone method.
* New: In CRL::RoutingLayerGauge, add new parameter "PWireWidth"
to give the width of a wire when it not drawn in the prefered
routing direction. If it is set to zero, the normal width is
used.
* New: In CRL::PyRoutingGauge, export the updated constructor
interface. It is *not* backward compatible, one must add the
PWireWidth parameter in the various kite.py configuration
files (in etc/).
* Change: In AnabaticEngine::_gutAnabatic(), disable the minimum
area detection mechanism, replaced by a more complete one in
Katana::Track. Left commented out for now, but will be removed
in the future.
* Change: In Anabatic::AutoContact::updateLayer(), now systematically
calls setLayerAndWidth() to potentially resize the VIAs. This is
needed in real mode as VIAs are *not* macro-generated but have
their real final size.
* Change: In Anabatic::AutoContact::setLayerAndWidth(), select the
width and height of the contact using the gauge wire width *and*
perpandicular *wire width*.
* Change: In Anabatic::AutoSegment::_initialize(), the "VIA to same cap"
to PWireWidth/2, this will be the size of the VIA in the
non-preferred direction at the end cap (non-square in real mode).
* Change: In Anabatic::AutoSegment::getExtensionCap(), makes different
cases for symbolic and real. Use raw length in real, add half the
wire width in symbolic.
Add a flag to get the extension cap *only*, not increased of
half the minimal spacing.
* Change: In Anabatic::AutoSegment::bloatStackedStrap(), enhanced,
but finally unused...
* New: In Anabatic::AutoSegment::create(), use the PWireWidth when
the segment is not in the preferred routing direction (and of
minimal width).
* New: In Anabatic::Configuration, add new getPWirewidth(),
DPHorizontalWidth() and DPVerticalWidth() accessors.
* Change: In AnabaticEngine::setupPreRouteds(), skip components in
in "cut" material. We are only interested in objects containing
some metal (happens in real mode when VIAs cuts are really there).
* New: In Katana::PowerRailsPlanes::Rail::doLayout(), add an hard-coded
patch that artificially enlarge the *wide wire* so the spacing for
wide wire is enforced. For now, two pitches on each side for
"FlexLib" gauge.
* New: In Katana::Track, add support to find and correct small wire
chunks so they respect the minimum area rules.
Two helper functions:
* ::hasSameLayerTurn(), to find if a a TrackElement as non-zero length
perpandicular is same layer connected to it.
* ::toFoundryGrid(), to ensure that all coordinates will be on the
foundry grid (may move in a more shared location).
* ::expandToMinArea(), try to expand, *in the routing direction*
the too small wire so it respect the minimal area. Check for the
free space in the track.
Track::minExpandArea() go through all the TrackElements in the track
to look for too small ones and correct them.
* Change: In Katana::RoutingPlane, add an accessor to get the tracks.
* New: In KatanaEngine::finalizeLayout(), add a post-treatment to find
for minimal area violations.
* Change: In cumulus/plugins.block.configuration.GaugeConf, add a
routingBb attribute that will serve as a common reference to all
the functions calculation track positions. We must not have two
different reference for the core and the corona. The reference
is always the corona when we working on a complete chip.
* New: In cumulus/plugins.block.configuration.GaugeConf.getTrack(),
Simplified and more reliable way of getting tracks positions.
Use the routingBb.
* New: In cumulus/plugins.block.configuration.GaugeConf.rpAccess(),
Make use of getTrack() to get every metal strap on the right
X/Y position.
* New: In cumulus/plugins.block.configuration.GaugeConf.expandMinArea(),
As those wires are left alone by the router, it is our responsability
to abide by the minimal area rule here. Hence the code duplication
from the router (bad).
Mainly wires made for the clock tree, I mean.
* Bug: In cumulus/plugins.chip.configuration.ChipConf.setupICore(),
the core instance must be placed on the GCell grid, defined by the
slice height (X *and* Y).
* Bug: In cumulus/plugins.chip.corona.Builder(), forgot to use bigvia
for the corners of the inner ring.
* Bug: In cumulus/plugins.chip.pads.corona._createCoreWire(), hard-coded
patch for LibreSOCIO, the power/ground connectors toward the core
are too wide and can create DRC errors when put side by side.
Shrink them by the minimal distance.
* New: Added multiple clock support in H-Tree generation in alpha/block.
* New: In CRL/etc/<NODE>/<TECH>/plugins.py, added three new parameters
for block plugin config:
"block.spareSide" : The size of the minimum side of a buffered area.
(quad-tree leaf).
"spare.buffer" : The model of the cell buffer to be used.
"spare.maxSinks" : max number of sinks on a buffer before issuing
a warning (non-blocking).
* Bug: In Etesian::BloatCell::getAb(), never apply the bloat profile to
fixed cells. In case of buffers from the spare maxtrix it was leading
Coloquinte to detect an overlap of fixed cells, which it do not
support (rightly so).
* Change: In CRL/helpers/__init__.py, to ensure a complete restart of
the database the __init__.py must be called again, but it's not the
case with reload() (see Python doc). So helpers.resetCoriolis()
must explicitly removes the Coriolis related Python modules from
sys.modules (calling "del sys.modules[moduleName]").
That list of Coriolis Python modules is built by calling
helpers.tagConfModules(), it will tag all modules added to
sys.modules since startup. It will remove (much) more than
Coriolis modules, but that should be ok.
* Change: In CRL/etc/{node*,symbolic}/TECH/__init__.py, add a call to
helpers.tagConfModules() for the techno modules to be erased on
reset.
* Change: In CRL/helpers, cumulus/plugins, oroshi & karakaze,
Move towards more Python PEP8 compliance:
* All indentations sets to 4 spaces (in progress).
* In plugins, remove messages about software collections
and RHEL (too many case could wrongly lead to that).
Instead systematically uses "helpers.io.catch()".
* Put in lowercases all modules names. Note that C++ exported
modules *keep* their Capitalized names (to preserve the
identity with the C++ namespace).
* When making import, use full path.
* Rename the run function from "ScriptMain()" to "scriptMain()".
* Cleanup: In CRL/etc, remove obsoleted configuration files,
the one ending in ".conf". Keep those who have not been ported
to the new style yet.
* New: In Hurricane/src/configuration, first trial at replacing the
C preprocessor macros by C++ templates. Applied first to configuration
from VLSISAPD.
This is unfinished business, just a limited demonstrator for now.
It is installed as a separate Python library "Cfg2" which do not
interact with the rest of Coriiolis.
The end goal is to fully remove boost and merge VLSISAPD useful
components directly inside Hurricane.
* Bug: In CRL::ApDriver::DumpSegments(), when saving RoutingPads build
on Pin *not* at the top level (that is, Pin from an instance),
use the pin's orientation to choose the segment type.
* NORTH/SOUTH becomes a Vertical.
* EAST/WEST becomes an Horizontal.
Formerly, the segment direction was guessed only for the bounding
box, leading to segments in incorrect directions leading to DRC
errors (in nmigen/ALU16, net "b(10)").
* Bug: In CRL/symbolic/cmos/technology.py, forgotten import for
WarningMessage.
* New: In CRL/python/helpers.io, vprint() wrapper around print to display
messages according to the verbose level.
In etc/*, add messages in every configuration files so we may know
under which we are running.
* New: In bootstrap/coriolisEnv.py, add the "etc" directory to the
PYTHONPATH as initialization are now Python modules.
* New: In Hurricane/analogic, first groundwork for the integration of
PIP/MIM/MOM multi-capacitors. Add C++ and Python interface for the
allocation matrix and the list of capacities values.
* Change: In Hurricane::RegularLayer, add a layer parameter to the
constructor so the association between the RegularLayer and it's
BasicLayer can readily be done.
* Change: In Hurricane::Layer, add a new getCut() accessor to get the
cut layer in ViaLayer.
* Change: In Hurricane::DataBase::get(), the Python wrapper should no
longer consider an error if the data-base has not been created yet.
Just return None.
* Bug: In Isobar::PyLayer::getEnclosure() wrapper, if the overall
enclosure is requested, pass the right parameter to the C++ function.
* Change: In AllianceFramework, make public _bindLibraries() and export
it to the Python interface.
* Change: In AllianceFramework::create(), do not longer call bindLibraries().
This now must be done explicitely and afterwards.
* Change: In AllianceFramework::createLibrary() and
Environement::addSYSTEM_LIBRARY(), minor bug corrections that I don't
recall.
* Change: In SearchPath::prepend(), set the selected index to zero and
return it.
* Change: In CRL::System CTOR, add "etc" to the PYTHONPATH as the
configuration files are now organized as Python modules.
* New: In PyCRL, export the CRL::System singleton, it's creation is no
longer triggered by the one of AllianceFramework.
* New: In CRL/etc/, convert most of the configuration files into the
Python module format. For now, keep the old ".conf", but that are no
longer used.
For the real technologies, we cannot keep the directory name as
"180" or "45" as it not allowed by Python syntax, so we create "node180"
or "node45" instead.
Most of the helpers and coriolisInit.py are no longer used now.
To be removed in future commits after being sure that everything
works...
* Bug: In AutoSegment::makeDogleg(AutoContact*), the layer of the contacts
where badly computed when one end of the original segment was attached
to a non-preferred direction segment (mostly on terminal contacts).
Now use the new AutoContact::updateLayer() method.
* Bug: In Dijkstra::load(), limit symetric search area only if the net
is a symmetric one !
* Change: In Katana/python/katanaInit.py, comply with the new initialisation
scheme.
* Change: In Unicorn/cgt.py, comply to the new inititalization scheme.
* Change: In cumulus various Python scripts remove the call to
helpers.staticInitialization() as they are not needed now (we run in
only *one* interpreter, so we correctly share all init).
In plugins/__init__.py, read the new NDA directory variable.
* Bug: In cumulus/plugins/Chip.doCoronafloorplan(), self.railsNb was not
correctly managed when there was no clock.
* Change: In cumulus/plugins/Configuration.coronaContactArray(), compute
the viaPitch from the technology instead of the hard-coded 4.0 lambdas.
In Configuration.loadConfiguration(), read the "ioring.py" from
the new user's settings module.
* Bug: In stratus.dpgen_ADSB2F, gives coordinates translated into DbU to
the XY functions.
In st_model.Save(), use the VstUseConcat flag to get correct VST files.
In st_net.hur_net(), when a net is POWER/GROUND or CLOCK also make it
global.
* Change: In Oroshi/python/WIP_Transistor.py, encapsulate the generator
inside a try/except block to get prettier error (and stop at the first).
This commit degrades the run success rate of ARMv2a to 87% (40 iters).
* New: In CRLcore/etc/.../kite.conf, add configuration parameters:
katana.termSatReservedlocal
katana.termSatthreshold
for the new edge capacity computation system.
* New: In CRLcore/etc/symbolic/phenitec06/, add support for N. Shimizu
small I/O pads (supplied in phlib80). Tune various parameters of
Anabatic/Katana to increase routing success.
* Change: In CRLcore/alliance/ap/ApParser, make Pin external components,
so RoutingPad will be build upon in global routing.
Do not complain when a I/O pad has a physical instance that did
not exists in the netlist. Just create it (appeared in phlib80).
When no netlist instance exists in a pad, the pad Cell is still
considered as terminal.
* New: In Etesian::BloatCells, new profile named "3metals" better suited
for two routing metals technologies (i.e. Phenitec).
* New: In Anabatic::RawGCellsUnder, new CTOR which take only source &
target points instead of a segment. Needed to manage wide segment for
which the axis to consider is not that of the segment (one axis for
each track it intersect).
* New: In Anabatic::GCell, add a RoutingPad count attribute, for Edge
reservation computation.
* New: In AnabaticEngine::computeEdgeCapacities(), instead of decreasing
all edges of a fixed amount (hTrackReservedLocal), guess the GCell
cluttering from the number of RoutingPads that it contains.
For non-saturated GCells, the four edges are decreased by the number
of RoutingPads. We use the maximum from the two neigboring GCells.
The hTrackReservedLocal parameter is now used only as a *maximum*
that the edge reservation can reach.
If a GCell is saturated (more than 8 RoutingPads, the saturation is
propagated horizontally to 2 neigboring GCells).
* Change: In AutoContactTerminal::getNativeConstraintBox(), use a more
flexible gauge name matching for terminal vertical extensions correction.
Namely, match all "msxlib*" kind of gauges.
* Change: In AutoSegment::setAxis(), add the ability to force the axis
position, even if it is a non-canonical segment. Maybe needed in the
initialisation steo, before the first canonisation is performed.
* New: In NetBuilder, added new methods _do_1G_1PinM1() and _do_2G_1PinM1(),
to manage coronas for Phenitec designs.
To avoid various side effects from segments being too close from
the north / east side of the routing area, make those segments fixeds.
* Change: In KatanaEngine::annotateGlobalGraph(), the management of wide
wires was wrong. The axis to use to find the underlying GCells is the
one of the track, not of the segment. This was creating bad edge
capacity computation under the power ring of a block and subsequently
routing failures.
* New: In Kanata::Manipulator, added method reprocessParallels(), not used
though, but keep it anyway, might be of use later...
* New: In Kanata::Manipulator, added method avoidBlockage() for terminal
METAL2 in non-preferred direction, restrict the terminal and turn
constraint box at the current position of the perpandicular, so it
doesn't create a deadlock in METAL2.
* Change: In SegmentFsm::conflictSolveByPlaceds(), if we cannot break
using the whole overlap, try the first atomic overlap.
* New: In SegmentFsm::_slackenStrap(), manage conflict between a non-prefered
segment and a blockage, this when to call avoidBlockage()...
* New: In Katana::Configuration, management of the new edge computation
parameters:
katana.termSatReservedlocal
katana.termSatthreshold
* New: In Cumulus/plugins/Core2Chip, support for Phenitec I/O pads.
* Change: In Hurricane::SharedName, replace the incremental Id by a hash key.
This is to ensure better deterministic properties. Between use cases,
additional strings may have to be allocated, shitfing the ids. Even if
hash can be duplicated, we should be able to ensure that the absolute
order in map table should be preserved. Supplemental strings are inserted
in a way that keep the previous order.
* Change: In CRL/etc/symbolic/cmos/kite.conf, add "katabatic.routingGauge"
default parameter value ("sxlib").
* Change: In CRL/etc/common/technology.conf, define minimal spacing for
symbolic layers too (added for METAL4 only for now).
* Change: In CRL::Histogram, extend support to dynamically sized histograms.
Add a text pretty print with table and pseudo-curve.
* Change: In Cumulus/plugins/ClockTreePlugin, create blockage under the
block corona corners so the global router do not draw wire under them.
This was creating deadlock for the detailed router.
When the abutment has to be computed, directly use Etesian to do it
instead of duplicating the computation in the Python plugin.
* New: In Etesian, as Coloquinte seems reluctant to evenly spread the
standard cells, we trick it by making them bigger during the placement
stage. Furthermore, we do not not uniformely increase the size of the
cells but create a "bloating profile" based on cell size, cell name
or it's density of terminals. Currently only two profiles are defined,
"disabled" which does nothing and "nsxlib" targeted on 4 metal layer
technologies (aka AMS 350nm, c35b4).
* Bug: In Knik::MatrixVertex, load the default routing gauge using the
configuration parameter "katabatic.routingGauge" as the default one
may not be the first registered one.
* New: In AnabaticEngine::setupNetDatas(), build a dynamic historgram of
the nets terminal numbers.
* Bug: In Anabatic::AutoContact::Invalidate(), always invalidate the
contact cache when topology is invalidated. In case of multiple
invalidations, if the first did not invalidate the cache, later one
that may need it where not allowed to do so. The end result was correct
nonetheless, but it did generate annoying error messages.
* Bug: In Anabatic::AutoContactTurn::updateTopology(), bad computation
of the contact's depth when delta == 2.
* Bug: In Anabatic::Gcell::getCapacity(), was always returning the west
edge capacity, even for the westermost GCell, should be the east
edge in that case.
* New: In Anabatic::AutoSegment, introduce a new measure "distance to
terminal". This is the minimal number of segments separating the
current one from the nearest RoutingPad. This replace the previous
"strong terminal" and "weak terminal" flags.
This distance is used by Katana to sort the events, we route the
segments *from* the RoutingPads *outward*. The idea being that if we
cannot event connect to the RoutingPad, there is no points continuing
as thoses segments are the more constraineds. This gives an order close
to the simple ascending metals but with better results.
* New: In Anabatic::AutoSegment, introduce a new flag "Unbreakable", disable
dogleg making on those segments. mainly intended for local segments
directly connecteds to RoutingPads (distance == 0).
* New: In Anabatic::AutoSegment, more aggressive reducing of segments.
Now the only case where a segment cannot be reduced is when it is
one horizontal branch in a HTee or a vertical on a VTee. Check if,
when not accounted the source & target VIAs are still connex, if so,
allow reducing.
* New: In Anabatic::AutoContact, new state flags CntVDogleg & CntHDogleg
mainly to prevent making doglegs twice on a turn contact. This is to
limit over-fragmentation. If one dogleg doesn't solve the problem,
making a second one will make things worse only...
* Bug: In Anabatic::Configuration::selectRpcomponent(), we were choosing
the component with the *smallest* span instead of the *bigger* one.
* New: In Anabatic::GCell, introduce a new flag "GoStraight" to tell that
no turn go be made inside those GCells. Mainly used underneath a block
corona.
* New: In AnabaticEngine::layerAssign(), new GCellRps & RpsInRow to manage
GCells with too many terminals. Slacken at least one RoutingPad access
when there is more than 8 RoutingPad in the GCell (slacken or change
a vertical METAL2 (non-preferred) into a METAL3).
* Change: In Anabatic::NetBuilderHV, allow the use of terminal connection
in non-preferred direction. That is, vertical METAL2 directly connected
to the RoutingPad (then a horizontal METAL2). This alllows for short
dogleg without clutering the METAL3 layer (critical for AMS c35b4).
Done in NetBuilderHV::doRp_Access(), with a new UseNonPref flag.
Perform some other tweaking on METAL1 access topologies, to also
minimize METAL3 use.
* New: In AnabaticEngine::computeNetConstraints(), also compute the
distance to RoutingPad for segments. Set the Unbreakable flag, based
on the distance and segment length (local, short global or long global).
New local function "propagateDistanceFromRp()".
* Change: In AnabaticEngine.h, the sorting class for NetData, SparsityOrder,
is modificated so net with a degree superior to 10 are sorted first,
whatever their sparsity. This is to work in tandem with GlobalRouting.
* New: In Katana::TrackSegmentNonPref, introduce a class to manage segment
in non-preferred routing direction. Mostly intended for small METAL2
vertical directly connected to RoutingPad. Modifications to manage
this new variant all through Katana.
* Change: In Katana::GlobalRoute, DigitalDistance honor the GoStraight flag
of the GCell. Do not make bend inside thoses GCells.
* Change: In KatanaEngine::runGlobalRouter(), high degree nets (>= 10) are
routed first and whitout the global routing estimation. There should be
few of them so they wont create saturations and we want them as straight
as possible. Detour are for long be-points.
Set the saerch halo to one GCell in the initial routing stage (before
ripup).
* Bug: In KatanaEngine & NegociateWindow, call _computeCagedconstraints()
inside NegociateWindow::run(), as segments are inserted into tracks
only at that point so we cannot make the computation earlier.
* Change: In Katana::Manipulator::repackPerpandiculars(), add a flag to
select whether to replace the perpandiculars *after* or *before* the
current segment.
* Change: In Katana::NegociateWindow::NegociateOverlapCost(), when the
segment is fully enclosed inside a global, the longest overlap cost
is set to the shortest global hoverhang (before or after).
When the cost is for a global, set an infinite cost if the overlapping
segment has a RP distance less or equal to 1 (this is an access segment).
* Bug: In Katana::PowerRailsPlane::Rail::doLayout(), correct computation of
the segments extension cap.
* New: In Katana::QueryPowerRails::addToPowerRail(), add support for Pad.
* Change: In Katana/PreProcess::protectCagedTerminals(), apply the contraints
to any turn connected to the first segment of the RoutingPad so the
perpandicular constraints got propagated to the perpandicular segment...
* Change: In RoutingEvent, cache the "distance to RP" value.
* Change: In RoutingEvent::Key::compare(), sort *first* on distance to
RoutingPad, then layer depth. If both distance to RoutingPad is null,
then sort on segment length.
* Change: In RoutingEvent::_processRepair(), try a repack perpandicular with
perpandiculars first (then with perpandicular last, then give up).
* Change: In SegmentFsm::bindToTrack() and moveToTrack(), set an axis hint
when creating the insertion event.
* Change: In SegmentFsm::_slackenStrap(), add a step through slacken between
minimize and maximum slack (wihch directly end up in unimplemented).
* Change: In Session::_addInsertEvent(), add an axis parameter needed when
the axis of the segment is not the one of the track (case of wide
segments or non-preferred direction).
* Bug: In Track::_preDestroy(), bad management of the TrackElement reference
count. Destroy the segment only when reaching zero...
* Bug: In Track::expandFreeIneterval(), forgotten to manage case when there
is a set of overlaping segments at the "end" of the track, the
EndIsTrackMax was not set.
* Change: In TrackCost::Compare, increase the cost when an overlaping
segment is at it's ripup limit. We should try *not* to rip it up if
we can. Add a dedicated flag "AtRipupLimit".
* Change: In TrackElement, add proxies for isUnbreakable(), new function
updateTrackSpan().
* New: In TrackFixedSegment CTOR, when a supply wire of METAL2 or above is
found, make the underlying GCells "GoStraight".
* New: In TrackElement::canDogleg(GCell*), check for already done perpandicular
dogleg on source/target (reject if so).
* Change: In Hurricane::Error constructors disable the backtrace generation.
(*very* slow).
* Change: In Hurricane::Library::getHierarchicalname(), more compact
naming. Remove the name of the root library.
* New: In Hurricane::Net, new type "FUSED", for component with no net.
More efficient than having one net for each.
* Change: In CellViewer, BreakpointWidget, use Angry Birds icons.
* Change: In CellWidget::State, use the hierarchical name (cached) as key
to the state. This allow to load two cells with the same name but from
different libraries in the widget history.
* Change: In PyGraphics, export "isEnabled()" and "isHighDpi()" functions.
* Change: In CRL/etc/symbolic/cmos/plugin.conf, and
CRL/etc/common/plugin.conf use the physical dimensions converters.
* Change: In CRL/etc/symbolic/cmos/technology.conf, make the GDS layer
table coherent with the default Alliance cmos.rds.
* New: CRL/python/helpers/io.py, put ErrorMessage new implementation here,
along with a new ErrorWidget written in PyQt4. It seems finally that
PyQt4 can be used alongside Coriolis Qt widgets.
New ErrorMessage.catch() static function to manage all exceptions
in except clauses.
* Change: In CRL/python/helpers/, no longer use ErrorMessage.wrapPrint(),
directly print it.
Rewrite the utilities to display Python stack traces "textStacktrace()"
and "showStacktrace()".
* Change: In CRL::AllianceFramework, shorten the names of the libraries.
* Change: In CRL::ApParser & CRL::ApDriver, more accurate translation between
Alliance connectors (C record) and Hurricane::Pin objects. Pin are no
longer made square but thin and oriented in the connecting direction.
Use the new fused net for unnamed components.
* New: In CRL::GdsParser, implementation of SREF parsing, i.e. instances.
Due to the unordered nature of the GDS stream, instances creation are
delayed until the whole stream has been parsed and only then are they
created.
For the sake of reading back Alliance s2r GDS, we assume that any
TEXT following a boundary is the Net name the boundary (component)
belongs to.
Create abutment box for Cells, computed from the bounding box, so
the Hurricane QuadTree could work properly.
Make use of the fused net for unnamed components.
* New: In Cumulus/plugins/chip, complete rewrite of the I/O pad management.
Now we can mix real (foundry) pads and a symbolic core.
To cleanly support the de-coupling between the real part and the
symbolic one we introduce a new intermediary hierarchical level, the
corona. We have now:
Chip --> Pads + Corona --> Core.
At chip level (and if we are using real pads) the layout is fully
real (excepting the corona).
The Corona contains everything that is symbolic. It has symbolic
wires extending outward the abutment box to make contact with the
real wires coming from the pads.
In the pad ring we can use corners instances (or not), pad spacers
or directly draw wires between connectors ring pads.
Provide two flavors: placement only or full place & route.
WARNING: If routing in a second step, *do not route* the *Chip* but
the *Corona*.
* Change: In Cumulus/plugins/clocktree, give the modified Cell an
additional extension of "_cts" (Clock Tree Synthesis) instead of
"_clocked", to follow the common convention.
* New: In cumulus/plugins/S2R.py, encapsulate call to Alliance S2R and
reload the translated Cell in the editor.
* New: In cumulus/plugins/core2chip, provide an utility to automatically
create a chip from a core. To work this plugins must have a basic
understanding of the pad functionalities which may differs from
foundry to foundry. So a base class CoreToChip is created, then for
each supported pad foundry a derived class is added. Currently we
support AMS c35b4 and Alliance symbolic cmos.
* Bug: In Anabatic::Configuration, read the right configuration parameter
"anabatic.topRoutinglayer" (Katana), and not the one for Katabatic...
* Change: In Unicorn/cgt.py, process the plugins in alphabetical order
to ensure a reproductible ordering of the menus...
* Bug: In CRL/etc/symbolic/cmos/plugins.conf, rails dimensions are no
longer expressed directly in lambda. Must be created using helper.l().
* Change: In CRL::ApParser, slightly more smart management of Pin width.
Must normalize Pin behavior between Alliance & Hurricane as in
Alliance they have only one dimension.
* Change: In CRL::LefImport, if a net name end with "!", assume it's a
global one. Have to check this naming convention.
* Change: In Anabatic::NetBuilderHV::_do_1G_1PinM3() & _do_1G_1PinM2()
now implemented. Needed for the corona routing support.
* Change: In AnabaticEngine::setupPreRouted(), exclude segments outside
the abutment box.
* Change: In KatanaEngine::PowerRails, remove the I/O pad support as now
we route only inside the Corona. So only one vdd/vss/ck are supported.
* New: In cumulus/plugins/ChipPlugin.py, complete rewrite of the chip
support:
* Uncouple pad I/O ring whith real cells (foundry) from a symbolic
core. A new intermediate level "corona" is introduced to handle
the real/symbolic transition.
* Ability to explicitly setup position of the pads on the chip side
in case of uneven distribution.
* Enable clock tree to be build with 3 metal only (M2 to M4) instead
of (M2 to M5).
* New: In Hurricane::IntrusiveMap, introduce IntrusiveMapConst which allow
to search with a "const Key&" instead of a "Key", sparing the copy
construction of the Key.
* Change: In Hurricane::Cell::NetMap, use the new kind of map with
"const Name&" key access. This speeds up the Cell::getNet() method
by suppressing one copy construction of a Name, which are costly
after all...
Should review the whole code to use "const Name&" everywhere it
is possible.
* Change: In Hurricane::Entity & Hurricane::DBo, displace the unique
identifier from Entity to DBo (move up to the base class).This
to allow us to build deterministic map of DBo requireds in
UpdateSession (which is built upon a SharedProperty).
WARNING: This break the JSON database exportation support, do not
use it until fixed/rewritten.
* Change: In Hurricane::Layer, add an attribute to know if a layer is
associated to a blockage. Modificate accordingly PyLayer and
BasicLayer.
* Change: In Hurricane::SharedProperty, the set of owners (DBo*) is now
stored in a std::set sorted on the objects Ids, instead of a simple
vector. The linera search time through the std::vector was starting
to show (ISPD05 bigblue1).
* Bug: In Isobar::PyInstance, make full contructor signature (5 arguments)
conform to the C++ one. It was only accepting the four first and
forcing the placement status to be FIXED.
* Bug: In CRL/etc/symbolic/ispd05/kite.conf, update for the new configuration
requirements where all distance must be converted into DbU in the
file itself (use "helpers.l()", "helpers.m()"). Apply to the cell &
routing gauges.
* Bug: In CRL/etc/symbolic/ispd05/technology.conf, update for the new
configuration. "helpers.initTechno()" *must* by called first thing
in this file in order for the Technology to be created.
* New: In CRL::AllianceFramework, add matchCellGauge() &
matchCellgaugeByHeight()
* New: In CRL::CellGauge, add a flag to distinguish gauges meant for
IO Pads and an "isPad()" predicate.
* Change: In CRL::Ispd05Bookshelf, flush the UpdateSession stack every
1000 elements additions. Maybe not necessary now the the UpdateSession
property relies on a std::set instead of a std::vector.
* New: In CRL::LefImport, support for SITE and match/create the appropriate
CellGauge on the fly. Specific support for MACROS that are flagged PAD.
Add a dedicated post-treatment for PAD connectors, extend them toward
the boundary of the nearest abutment box side. Tested only on AMS 350nm
c35b4 for now.
This part is most likely to be tweaked for every kind of real foundry
pad that we may encounter...
* Change: In EtesianEngine::findYSpin(), use the C++ "for" construct to loop
over Collections.
* Change: In Unicorn/cgt.py, register the Python/C++ tutorial support by
default.
* Change: In CRL/etc/cmos/kite.conf, setup correct H/K parameters for
the Katana global router. Value copied from Knik. They give a
faster solution.
* New: In CRL/etc/cmos45/, new symbolic settings adapted to FreePDK 45nm.
Courtesy of N. Shimizu. To be used with NSXLIB.
* New In CRL::System, add "coriolis_top" to the set of pathes available
to the user.
* Change: In boostrap, remove support for Chams.
* New: In Hurricane::Technology, added support for DTR rules, UnitRule,
PhysicalRule and TwoLayersPhysicalrule. Added devices descriptors and
models descriptors (for Spice). Spice description is not used yet
but kept anyway in case of future use.
* New: Hurricane::Analog whole library and it's Python interface. This
provides support for transistors, capacitors and resistors. Only
transistor support is fully implemented as of now.
* New: In CRL/python/coriolisInit.py, read configuration files for the
Analog extension (analog.conf & devices.conf). Thoses are optionals
and a simple warning is issued if not found.
Added helpers/AnalogTechno.py DTR loading helper.
Add analog configuration files for 180/scn6m_deep_09.
* New: Oroshi tool that provides actual layout drawing for transistors.
* Bug: In CRL/etc/NODE/VENDOR/Technology.conf, the database must be configured
as early has possible so the functions ensuring length conversions can
work correctly (l(v), u(v)). So we can no longer rely on a table to be
read after the execution of the file. We perform a direct call to the
helpers.Technology.initTechno() function. And it must be made first
thing.
In all tables taking dimensions, we must use one of the converter
function helpers.l(v), helpers.u(v) or helpers.n(v) so the the value v
get converted in lambda, microns or nanometer (resp.). Make the
modifications in all technology.conf and kite.conf files.
* Change: In CRL/coriolisInit.py, remove the technoConfig variable that has
been replaced by a direct call to helpers.Technology.initTechno().
* Change: In CRL/helpers.Alliance.loadRoutingGaugesTable(), no longer try to
convert coordinates, they must already be in DbU.
* Change: In CRL/helpers.__init__.py, remove lambdaMode() and micronsMode()
they could not be made to work as expected. Create l(), u(), n() as
replacement.
* New: In CRL, implement a true GDSII driver. The driver is directly under
CRL and do not use an intermediate structure in vlsisapd. The ASCII
GDSII is removed.
Huge polygons are not supported yet. Have to be split up in
sub-polygons of less than 4000 vertexes.
Symbolic layout can be exported to give a rough idea of the layout
but RDS expension is not applied. Symbolic composite layers are
expansed into their basic layers so the design *looks* normal.
* Deprecated: In CRL, remove all traces of the old XML configuration
parsers. No one needs them now, including Chams.
* Bug: In CRL::BlifParser, before blindly loading the model of a subckt
from disk with AllianceFramework, checks if it is in the Catalog
first. Load with AllianceFramework only cells that are in the
Catalog.
This prevent a file of the same name than a model to be loaded
shadowing the later defintion of the model in the Blif file.
All this is due to the fact that Blif could be non-ordered for
the models...
* Change: In Hurricane::BasicLayer, the "extract number" is replaced
by a GdsLayer and GdsDatatype to generate accurate GDS files.
Even if datatype is 0 most of the time.
Update all the "technology.conf" files in CRL to provide those
two numbers.
* New: Hurricane::Triange as been renamed into Hurricane::Polygon.
Add support for convex polygons. Polygon are approximateds by
excess by a manhattan rectilinear polygon (with potentially
thousands of vertexes). To reduce the memory footprint,
compaction techniques reducing by at least a factor 4 has been
implemented. We could go further by only storing the non-repetitive
part of the edge (defined by the integral fraction dY/dY).
We will see, if the program slows too much.
The manhattan approximate is always computed but displayed
only if the polygon grid step is greated than 4 pixels.
The level of approximation of the polygons can be controlled
through the "DbU::_polygonStep" parameter.
* Change: In CRL/coriolisInit.py and CRL/helpers/Technology.py, regroup
all DbU related parameters into "technoConfig" (i.e. suppress
"viewerConfig"). Update all the relevant technology.conf configuration
files.
Change the loader behavior so that "technoConfig" is read first
and is now responsible for creating the Technology of the DataBase.
* New: In Hurricane::CellWidget, added support for displaying mahanttanized
polygons.
* Change: In documenation/scripts/expample/polygons.py, perform (I hope)
a comprehensive test of the polygons (check all slopes, clockwise and
conter-clockwise).
* New: In Hurricane::DbU, added template to manage vector<> of DbU.
Support for the "polygonStep" parameter.
* Bug: In Anabatic::Dijkstra, the degree of a vertex (the number of neighbors
belonging to the same net) was miscalculated. This was leading, in the
materialize step to some feed-through vertexes not being broken.
Leading in turn to incomplete transformation of the detailed routing.
Also in _trackback(), the degree of the first vertex we were backtracking
from was not incremented.
* Bug: In Anabatic::Dijkstra::materialize(), systematically use
GCell::breakGoThrough() on both source and target. This is needed when
we are in the ripup phase as both source and target can be go-through.
This was also leading to incomplete detailed routing transformation.
* Change: In Anabatic::Edge::ripup(), ripup one third of the segments instead
of thoses exeeding the global length threshold. This way we are sure to
desaturate an edge. Needs to be further calibrated.
* Change: In Aanabatic::GCell::breakGoThrough(), no longer return NULL.
Return existing gcontact if any. Break if it is a go-through and create
a new gcontact in last resort. Maybe rename this function.
* New: In Anabatic::Configuration, new parameters:
- anabatic.edgeHScaling, to adjust the length of the horizontal edges
relative to the vertical ones (this is a ratio).
- anabatic.globalIterations, set the maximum number of ripup passes
of the global router.
* New: In CRL/etc/*/kite.conf, added new parameters anabatic.edgeHScaling
and anabatic.globalIterations.
* New: In Katana::GlobalRoute::DigitalDistance, take into account the new
edgeHScaling factor. Must be used when the capacity of V-edges differs
greatly for H-edges (case of AMS 350nm c35b4 for instance).
* Bug: In Katana::GlobalRoute::DigitalDistance, the historic cost is
computed for an edge length of "1". Must be multiplicated by the
current edge length to have any measurable effect.
This bug is finally explaining why the ripup was producing the
same solutions over and over, the historical cost was negligible!
* New: In Commons, inspector support for std::pair<T,U>.
* New: In Hurricane::Layer, ContactLayer & ViaLayer, support for non
square VIAs. The hole (cut) remains square, but the various metal
extensions can now be different in X and Y. The ::getEnclosure()
method now takes a flag EnclosureH / EnclosureV.
* New: In Hurricane::DbU, inspector support for:
std::pair<DbU::Unit,DbU::Unit>
std::array<DbU::Unit,3>
Must be defined here as DbU do not exists yet in Commons.h
* Bug: In Hurricane::Interval::getSize(), when the interval is "full span",
do not return the difference between min and max, but directly DbU::Max.
(the previous result was -1 !)
* New: In CRL Core Python/Technology.py, support for non square VIAs in
the configuration files. Applied to FreePDK 45.
* New: In CRL::RoutingGauge, added a "symbolic" flag to tell if a gauge
is for symbolic layout or not. Exported to Python.
* New: In Anabatic::AutoHorizontal::updatePosition(), differentiated
computation for soure or target taking account of the VIA extension
in the right segment metal (due to non-square VIAs).
* Change: In Anabatic::AutoHorizontal::_makeDogleg(), the dogleg is
UP for HV gauges and DOWN for VH.
* New: In Anabatic::AutoSegment::_initialize(), create a cache of the
various extension length for each layer (viaToTop, viaToBottom,
viaToSame).
New implementation of getExtensionCap() using the previous cached
extension table. See updatePositions().
New static functions to access the extension cache in the header:
getViaTotopCap() ...
* Change: In Anabatic::AutoSegment, in various update methods, updateOrient()
must always be called *before* updatePositions() as extensions are
dependant on source/target.
* New: In Anabatic::AutoSegment::getEndAxes() compute the position of the
first source and last target position (center/axes) on an *aligned*
set of segments.
* New: In Anabatic::AutoSegment, add a new state flag SegAxisFixed to
signal segments that can be put on only one track. Specific case
to VH gauge for a M1 vertical terminal with a M2 vertical segment.
The M2 is effectively bound to the M1 axis position.
* Bug: In Anabatic::NetBuilderVH::_do_xG_xM1_xM3(), in case of E/W global
and only one RoutingPad the connexion to the RoutingPad was duplicated.
It was valid, but totally stupid.
* Bug: In Anabatic::Session::_canonize(), for an aligned segment set,
intersect the user constraints from all segments instead of only
considering the canonical one.
Issue a warning about too tight constraints only for symbolic
gauges. It may be correct for the real ones.
* New: In Katata::DataNegociate::update(), more accurate computation
of the perpandicular free interval. Use segment extension cap
calculation. Create a special case for fixed axis segments allowing
them to find alternative free interval, try under source and under
target as they are likely to be draggable segments.
* Change: In Katana::Manipulator::relax(), use the extension cap value
to compute the axis of the perpandicular segemnts.
* Change: In Katana::Manipulator::moveUp(), now move up the whole set
of aligned segments instead of just the canonical one.
* Change: In Katana::NegociateWindow::loadRoutingPads(), more accurate
TrackMarkers insertions for fixed terminals.
* New: In Katana::RoutingEvent::Key::Compare::operator(), segments with
fixed axis are processed prior to any others.
* New: In Katana::RoutingEventLoop, store segment pointers instead of
ids to generate more accurate error messages.
* Change: In Katana::RoutingPlane::create(), perform local track
assignment only for HV gauges.
* Change: In Katana::SegmentFsm::_slackenLocal(), add a "dragMinimize"
step in the automaton. Mutliple states transitions can occurs in
a row if an action fails.
* New: In Katana::Session::_toIntervalAxis(), normalize interval
bounds so they are on track positions (by shrinking the interval).
* Bug: In Katana::TrackMarker CTOR, the weigh computation was wrong.
* Change: In CRL Core, etc/, update the configuration files of real
technologies. Mostly for FreePDK 45. This work is also done for
AMS c35b4 (350nm) but in a private (SoC) git repository.
Added a new parameter 'lefImport.minTerminalwidth' for the
minimum size (width) of a metal1 terminal in standard cells.
Corrected bug of the minimum trace level which must be
initialized to a great value and *not* zero;
* Change: In CRL Core, BlifParser, detect when there is no tie low
or tie high defined, issue an error (connexion left open) but
continue.
* New: In CRL::RoutingLayerGauge, new overlad of getTrackPosition()
with the parameter set of getTrackIndex(). Used to know if a
terminal is on-grid or not.
* New: In CRL::LefImport, smarter management of metal1 pins. Adds a
_pinPostProcess() function to select the external components
among the various shapes. If the gauge is VH, all the pin rectangles
are translateds into vertical segments (even if the metal1 gauge
says the tracks are horizontals).
The _pinPostProcess() function adds as external components of
a net, only the segments of a sufficent width as given in
'lefImport.minTerminalWidth' and that are on-grid.
* Change: In Hurricane::Technology, in all the layer connexity methods
(getLayers(), getMetalAbove(), getCutAbove(), getViaBetween(), ...)
the "useWorking" parameter is replaced by a more accurate "useSymbolic".
BEHAVIOR CHANGE: formerly, if a symbolic layer was requested, and
none was found, NULL was returned. Now, if the symbolic layer is not
found, we try to return the associated real one (same layer mask,
but not flagged as symbolic, and usually with a lowercase name).
All thoses changes have been propagated to Python bindings.
* Change: In Hurricane::BasicLayer and derived classes, rename the
"isWorking" attribute into "isSymbolic" (to match the technology
renaming).
* Change: In Hurricane::Cell::flattenNets(), ignore power, ground and
blockage nets for the flatten.
* Change: In CRL Core, in coriolisInit.py and Technology.py helpers,
rename the tables describing the technology as follow:
- symbolicLayersTable --> compositeLayersTable
- workingLayersTable --> symbolicLayersTable
- symbolicRulesTable --> layersExtensionsTable
This is to give the table names a more clearer semantic after
merging real technologies configurations (testbench AMS c35b4).
In particular, we need to define a composite layer for the
real VIAs, and not only the symbolic ones. And with correct
enclosures expressed in real dimensions (microns).
* Change: In CRL Core, in coriolis2/etc the file an directory structure
describing the technonolies is modified.
Before, one technology was split in two: the symbolic part that
may be shared across multiple real technology and the real technology
itself. To configure this we needed in ".coriolis2/techno.py" two
variables:
* symbolicTechnology.
* realTechnology.
After, we duplicate the symbolic technology in each real ones, so
to configure we only have to refer to one technology with the
variable:
* technology.
Pure sympolic technologies are still availables, associated with
a dummy real one.
We provides:
* 180/scn6m_deep_09 for MOSIS 180nm
* 45/freepdk_45 for FreePDK 45nm (work in progress).
* symbolic/cmos for classical Alliance symbolic.
* Change: In CRL Core python/helpers, SymbolicTechnology.py and
RealTechnology.py are now grouped under Technology.py.
* New: Hurricane::DataBase::getCell() method to search a cell through
all the libraries of *all* the frameworks, not just Alliance.
Also exported in Python interface.
* Bug: In Technology::getNthMetal() the function was not returning the
right metal, there was an offset of one. And when the offset was
0, no metal was even returned. Same fix goes for getNthCut().
The fault was in Mask<>::nthbit().
* Change: In Hurricane::CellWidget, the initial window size is too tiny.
Increase the size from 250 to 500 pixels.
Jean-Paul Chaput