Commit Graph

242 Commits

Author SHA1 Message Date
Jean-Paul Chaput 47b26476b7 Fixed bad perpand interval computation in AutoSegment::getTopologicalinfos(). 2022-10-27 19:47:44 +02:00
Jean-Paul Chaput 7c85835c8f Added partial support for Pad (component) in RoutinPad.
* New: In Hurricane::RoutingPad, added support if the supporting component
    is a Pad. The source/target positions are computed according to the
    most likely direction.
      Change the _getEntityAsComponent() function into an inline template
    _getEntityAs<T>().
      Change the flags from an enum to static const uint32_t.
* Change: In Anabatic::Configuration, use _getEntityAs<T>.
* Change: In Anabatic::Dijkstra, use _getEntityAs<T>.
* Change: In Anabatic::NetBuilder, use _getEntityAs<T>.
* Change: In Katabatic::LoadGrByNet, use _getEntityAs<T>.
* Change: In Katana::ProtectRoutingPads, use _getEntityAs<T>.
* Change: In Bora::AnalogDistance, use _getEntityAs<T>.
* Change: In Etesian::EtesianEngine, use _getEntityAs<T>.
2022-10-27 19:42:13 +02:00
Jean-Paul Chaput bba364eecc Fix: some AutoSegments where wrongly flagged as reduced.
* Bug: In Anabatic::AutoSegment::canReduce(), when looking at a fixed
    segment we were unconditionally flagging it as reduced if it was
    a "jumper", regardless of it's length.
      It was wrong, now also check for a length below the P-Pitch.
      This was introduced when implementing the channel routing.
2022-10-23 15:23:22 +02:00
Jean-Paul Chaput a6f61c1044 Update the channel routing feature to integrate with the OTC P&R.
* Update: In CRL/node600/phenitec/kite.py, update the routing gauge to
    the new format. So now we can use again SxLib-2M (channel routing
    SxLib for two metal technologies).
* Change: In CRL::BlifParser, if a master cell is not found in the
    AllianceFramework, then try in the Blif supplied libraries.
    This is used to load the zero, one and tie cells.
      Add a Blif::getCell() static function to look into the Blif
    supplied libraries.
* Change: In CRL::LefImport, sometimes there can be discrepencies between
    the LEF ROUTING layers and the Coriolis routing gauge. Now ignore
    routing layers that are *not* presents in the Coriolis gauge.

* Change: In AnabaticEngine, moved routingMode attribute from KatanaEngine,
    as some setup operations needs it.
* Change: In AutoSegment::canReduce(), allow fixed segments to be reduced
    if they are "jumpers" (turn+turn and top+top or bot+bot).
      This case arise on the edge of routing channels for fixed wires
    to connect terminals.
* Change: In AutoSegment::getTopologicalinfos(), compute differently the
    (leftBound,rightBound) interval when in channel mode.
       In over-the-cell mode, this interval is the one of the whole
    GCells under the wire. In channel mode, for fixed wires (that is,
    verticals connecteds to cells) this interval is reduced to half
    the GCell height, on the connected side of said channel.
      This allows Manipulator::_insertToTrack() to issue disantangling
    requests (push left/push right) for fixed segments that are face
    to face in the channel.
* Change: In Anabatic::Configuration CTOR, allow the cellGauge to have a
    different name from the routingGauge. Now if the cell gauge that
    should match the routing gauge is not found, fallback to the
    name set in "anabatic.cellGauge" parameter.
      Case occur when we try to match with CORE sites from LEF files.
* Change: In Etesian::Configuration CTOR, same change as in the
    Anabatic configuration.
* Change: In Anabatic::GCell::updateDensity(), never set the GoStraight
    flag in channel mode. This flag makes sense when there is at least
    4 routing layers (so we have 2 contiguous free of blockages).
* Bug: In Anabatic::Session::_getNearestGridpoint(), sometimes the nearest on
    grid point is outside the constraint box. Now force the point
    to remains inside constraints even if offgrid.

* Change: In Katana::DataNegociate::update(), perpandiculars that are
    either reduced or in non-preferred routing direction should not
    trigger a bug message.
* Change: In KatanaEngine::_check(), do not check for fixed, horizontal
    non-prefs AutoSegments in channel mode (avoid false bug display).
* Bug: In Manipulator::_forceToTrack(), slighty shrink (-1) the interval
    to free. The intersection function of intervals returns true when
    the two intervals *exactly* touches (1.vMax == 2.vMin). But in
    this specific case, they are not *overlapping* and no action
    should be taken...
* Bug: In Manipulator::_insertInTrack(), do not reject the track when
    we are overlapping a fixed vertical segment in channel mode.
    (Hmm, maybe already corrected by the previous one).
* Change: In Katana::NegociateOverlapCost(), in channel mode, do
    not put two overlaping vertical fixed segments into infinite cost.
    This happens when two cell connected verticals are face to face in
    a channel. We want them negociated the track (by shrinking their
    length) instead of excluding it right away.
* Change: In NegociateWindow::createTrackSegment(), in channel mode,
    do not attempt to create a track segment over a fixed and reduced
    AutoSegment.
      Do not attempt to put a non-preferred AutoSegment on a Track
    either.
* Bug: In RoutingEvent::revalidate(), the number of availables tracks
    was badly computed when in the pure constraint case, when there
    was only one it was reporting zero.
* Change: In TrackElements::TrackElements_Perpandicular::Locator,
    do not issue a bug when an non-pref or reduced AutoSegment do not
    have an associated TrackElement.
* Change: In TrackSegmentCost::update(), do not issue a bug when a
    perpandicular is reduded or non-pref and do not have a TrackElement.
2022-10-22 16:39:22 +02:00
Jean-Paul Chaput 5b469e458f Bug in AutoSegment::getEndAxis() computation.
* Bug: In AutoSegment::getEndAxes(), as the NonAligned flag may be
    wrong, always loop over the aligneds (if any). Then, the
    target axis computation was wrong, using a min() instead of
    a max().
      This was, in turn, wrongly activating isNearMinArea() and
    causing non-minimal length segment to have their extremeties
    extented. And, in the end, Track overlap.
2022-05-26 17:51:25 +02:00
Jean-Paul Chaput ba23a362fb Bad protection layer used in NetBuilderHV::doRp_AutoContact().
Bug: In NetBuilderHV::doRp_AutoContact(), when encountering a
  punctual RoutingPad in METAL1, create the protection in the
  METAL2 layer instead of METAL1 (current layer).
2022-05-21 13:19:28 +02:00
Jean-Paul Chaput 53db943d14 Discriminate between I/O pin and block pin in NetBuilder.
* Bug: In NetBuilder::setStartHook(), trigger the "move up" of
    global routing only when encountering RoutingPad of a macro
    block and *not* an I/O pin of the whole block (at the edge).
    Boils down to look if the RoutingPad is anchored on a Pin
    or a Segment (macro block).
2022-05-21 13:03:38 +02:00
Jean-Paul Chaput 42bf5d29d4 General review & redesign of the "minimum area checking" for segments.
* Change: In AutoHorizontal::setDuSource() & ::setDuTarget() (& AutoVertical),
    check that the requested "du" is less than a pitch (this is not an
    upper bound). Issue a warning if not true.
* Change: In AutoSegment::revalidate(), when passing the previous span
    interval to expandToMinLength(), if we are in creation stage, make
    it empty because it has no sense yet and can lead to a lock in a
    too narrow span.
      Change the coupled behavior of expandToMinLength() vs.
    unexpandToMinLength(), the call to "unexpand" will be done on
    AutoSegments that are flagged with SegAtMinArea, instead of
    using the return value of "expand". This way we control across
    multiple revalidate() if a segment can be "unexpanded".
* Bug: In AutoSegment::expandToMinLength(), not only try to shift left
    if we are beyoond the max bound but also to the right if we are
    below the min bound.
      the span on the target and source were miscalculated, we must
    add the half-minimal distance to get the span inside the Track.
* Change: In AutoSegment::isMiddleStack(), rename into isNearMinArea()
    as we check for any *small length* set of AutoSegments and not
    only the one part of a middle stack. In some rare instances,
    two aligned segments can nevertheless be too short.
* Bug: In AutoSegment::reduceDoglegLayer(), when finding a reduced
    segment also reset it's duSource & duTarget because it will
    no longer be an isolated strip of metal.
* Change: In AutoHorizontal::updateOrient(), when there is a
    source/target swap, no need to exchange the dxSource and
    dxTarget extentions.
* Change: In AutoHorizontal::setDuSource() & ::setDuTarget(), check
    for du bigger than the pitch, which should never occur and
    display a warning.
      Same modification in AutoVertical.
* Change: In Track::repair(), now invalidate the shifted segments
    to ensure cache coherency with the TrackElement.
      Do not take AutoSegment in non-preferred direction into
    account, and especially do not try to resize them.
      Now, invalidate the corrected segments (see below).
* Change: In KatanaEngine::finalizeLayout(), move the track repair
    stage from here into NegociateWidow::run(). This way we avoid
    the false warning about segment overlap in the data-base final
    check. The false warning was because the AutoSegment where
    shifted but not invalidated/revalidated leading to a cache
    incoherency in the TrackElement. Now they *are* invalidated
    and updated.
* Bug: In Track::checkMinArea(), do not check for minimal area when
    a segment is overlapping a same net neighbor. To avoid false
    minimum area violation warnings.
2022-05-18 14:54:14 +02:00
Jean-Paul Chaput ab13a02eed Do not make dogleg on segments in non-preferred routing direction.
* Bug: In AutoContactTurn::updateTopology(), in some case we were making
    doglegs on segments in non-preferred routing direction (mostly M2).
    This must be never be done. As, by construction, at least one segment
    of the turn must be in the preferred routing direction, always use
    this one to make the dogleg.
      This bug is likely to explain the remaining "bad spin" in the
    final self-check of the routing data-structure.
2022-05-12 17:54:05 +02:00
Jean-Paul Chaput cd60032d9c Added direct management of macro blocks I/O pins in METAL2 & METAL3.
The decoupling of the cell gauge and the routing gauge implies that
the METAL2 & METAL3 terminals of macro blocks cannot be aligned on
the routing tracks anymore. That is, an horizontal METAL2 terminal
will not be on a track axis, but offgrid, so we no longer can use
a METAL2 horizontal segment to connect to it. Making an adjustement
between the offgrid terminal and the on-grid segment has proven
too complex and generating difficult configuration for the router.
Moreover, METLA2 terminal could be fully inside a METAL2 blockage.
So now, when the gauges are decoupled, we connect the METAL2 and
METAL3 the same way we do for METAL1: *from above* in the perpandicular
direction and using a *sliding* VIA. We assume that those kind of
terminals in upper metals are quite long.

* New: In Hurricane::Rectilinear, export the isNonRectangle() method
    to the Python interface.
* New: In CRL::RoutingGauge, add function isSuperPitched() with the
    associated boolean attribute. Set to true when each pitch of
    each layer is independant (not low fractional multiples).
* New: In AnabaticEngine, add the ability to temporarily disable the
    canonize() operation (mainly used in dogleg creation).
* New: In AutoSegment::canonize(), do nothing if the operation is
    disabled by AnabaticEngine.
* Bug: In Session::_revalidateTopology(), disable the canonization
    during the topology updating of a net. Too early canonization
    was occuring in makeDogleg() leading to incoherencies when
    performing the later canonization stage over the complete net.
    Mostly occured in the initial build stage of the net.
* New: In GCell, add function postGlobalAnnotate(), if a layer
    is fully blocked (above 0.9), typically, under a blockage,
    add a further capacity decrease of 2 on the edges. So we may
    handle a modicum of doglegs.
* Bug; In GCell::addBlockage(), removeContact(), removeHSegment()
    and removeVSegment(), forgot to set the Invalidated flag.
    This may have lead to innacurate densities.
* Change: In GCell::updateDensity(), more complex setting of the
    GoStraight flag. This flag is now set if we don't have two
    *contiguous* below 60% of density. We need free contiguous
    layers to make doglegs.
* New: In NetBuilder, now manage a current state flag along
    with the state flag of the *source* GCell. This flag is used
    to tell if the GCell needs it's *global* routing to be done
    using the upper layers (METAL4 & METAL5) instead of the
    lower ones.
* New: In NetBuilder::setStartHook(), set the state flag of the
    GCell to ToUpperRouting when processing a global routing
    articulation and one of the base layer is obstructed
    above 0.9.
      In GCell with terminals, also set ToUpperRouting when there
    are some in METAL2 / METAL3 and the gauge is not super-pitched.
* New: In NetBuilder, function isInsideBlockage(), to check if a
    terminal is completely or partially enclosed in a blockage.
* Change: In NetBuilderHV::doRp_AutoContact(), remove support for
    trying to put on grid misaligned METAL2/METAL3.
      Instead systematically access them from above.
      Do not cover with fixed protection terminals that are already
    enclosed in blockages.
* Bug: In NetBuilderHV::doRp_AutoContact(), always add the terminal
    contact in the requested GCell and not the target/source one,
    in case the terminal span several GCells.
* Change: In NetBuilderHV::doRp_Access(), create the local wiring
    according to the RoutingPad layer.
* Change: In NetBuilderHV::_do_xG(), _do_2G(),
    create the global wiring in upper layers, according to the
    ToUpperRouting flag.
* Change: In NetBuilderHV::_do_xG_xM3(), now delegate to
    _do_xG_xM3_baseRouting() and _do_xG_xM3_upperRouting() if the
    density at terminal level is above 0.5.
* New: NetBuilderHV::_do_xG_xM3_baseRouting() and
    _do_xG_xM3_upperRouting() separated function to manage the
    local routing.
* Change: In NetBuilder::_do_globalSegment(), if the currently
    processed GCell or it's source is in ToUpperRouting mode,
    move up the global segment. Do *not* use the moveUp() function
    which would create doglegs unwanted at this stage.
* New: In KatanaEngine::annotateGlobalGraph(), call postGlobalAnnotate()
    on the GCell after the blockages have been taken into accound to
    add the penalty.
* Bug: In Track::getPrevious(), correctly manage the 0 value for the
    index argument. Strange it didn't show earlier.
      Same goes for Track::expandFreeInterval().
2022-04-27 21:56:41 +02:00
Jean-Paul Chaput 64056d25ee Layer assignment step was ignoring the number of RoutingPad threshold.
* Bug: In Anabatic::layerAssign(), during the step of desaturation of
    GCells that contains too much terminals (i.e. lot of *local*
    congestion), the desaturation threshold was har-coded to 8.
    Wich is fine for symbolic cmos but way too low for Flexlib.
      End result was that most straight wires where moved towards
    the upper layers, creating congestion (imbalance of layer
    densities).
      Now the parameter:
        * "anabatic.saturateRp" (default value:8) is correctly taken
	  into account.
2021-12-22 15:52:22 +01:00
Jean-Paul Chaput 3fa8d516bc Fix bad computation of perpandicular free space in DataNegociate.
NOTE: This is likely to explain why we still got overlap in the
      track coherency check in very rare occasions.

* Bug: In Katana::DataNegociate::update(), when computing the allowed
    free interval for the segment axis deduced from the perpandicularly
    connex segments, we account for the extension of the connecting
    VIA. Those extension varies according to the kind of VIA and are
    given by getExtensionCap().
      We were accounting for the source & target extension VIA on the
    parallel segments, assuming that source/target would not swap when
    the perpandicular is moved. Which is *not* true.
      Now account for the extension of the *connecting* VIA on all ends.
* Change: In AutoSegment::getTopologicalInfos(), enrich the list of
    perpandicularly connected segment with wether they are connex by
    their *source* or *target* contact. Mainly to be used by
    DataNegociate::update().
2021-12-18 17:45:17 +01:00
Jean-Paul Chaput 4ab6888b94 Fix Pin managment on north & east side of the cell abutment box.
* Change: In AnabaticEngine::setupPrerouteds(), take into account the
    number of Pins. Now consider a net containing multiple Pins and, at most,
    one segment as *non-routed".
      This case may specifically happens for nets with pins on the north
    and east side, which are slightly *inside* the abutment box (to be
    seen by the router) and draw with them their *outside* direct
    connection wire.
* Bug: In cumulus/plugins.chip.CoreWire, no longer put the north or
    east side external Pin *exacyly* on the abutment box but *one pitch*
    inside so they are correctly seens by the P&R (must be *inside*
    the area of a GCell).
2021-12-17 15:56:15 +01:00
Jean-Paul Chaput 2ca9e162ef Allow the detailed routing to be build from non-bottom P&R layers.
* New: In Anabatic::AutoSegment::create(), allow the created segment to
    be in any supported routing layer, and not only the bottom H & V.
    Modifications impact the *two* overload of the function.
* Change: In Anabatic::NetBuilderHV::doRp_AutoContacts(), for punctual
    METAL1, the protection has to be in METAL2. Bump the layer depth
    to correctly use the updated verstion of AutoSegment::create().
* Change: In AnabaticEngine::checkPlacement(), for the Pin, check that
    it's layer is in the routing gauge before anything else.
* New: In Katana::NegociateWindow::createTrackSegment(), if the track
    nearest the segment axis (refTrack) do not exists, call a
    breakpoint just before crashing.
2021-12-11 19:51:24 +01:00
Jean-Paul Chaput ca499e024c Restore the measurements taking in Anabatic/Katana.
* New: In AnabaticEngine::printMeasures(), re-enable runtime & memory
    footprint in measurements.
* Bug: In Anabatic::AutoSegment CTOR, correct computation of the initial
    number of global segments. We were relying on the "global" flag,
    which is *not* set at this stage. Now compare source and target
    GCells.
* New: In KatanaEngine::runGlobalRouter(), store H-ovE & V-ovE in
    measurements.
* New: In KatanaEngine CTOR, add the number of gates (flattened) to
    the measurments.
* New: In KatanaEngine::runNegociate(), add the number of GCells to
    the measurements.
* Change: In KatanaEngine::printCompletion(), compute the wirelengths
    in either lambdas (symbolic) or *nanometers* (real).
* New: In cumulus/plugins.block.Block, add a setting to request the
    Katana measurements dumping: "cfg.katana.dumpMeasures"
2021-11-24 15:52:56 +01:00
Jean-Paul Chaput 10bd5510da Fix library linking problem for gcc 9 and above (Ubuntu 20/Debian 11).
* Bug: In all CMakeLists.txt, it seems I was doing a worng use of
    target_link_library(). No longer add dependencies to the C++ base
    library but instead either to the Python associated module or
    to the final binaries. This was inderectly causing the linking
    problem related to Python (which was a misdirection).
* Bug: Typo in FindLibexecinfo.cmake, do not use FindLib[E]xecinfo.
* Change: In CRL/ccore/CMakeLists.txt, activate SKIP_AUTOMOC on
    bison/flex generated files.
* Bug: In viewer/PyHApplication, do not delete the C++ object in
    the Python destroy method.
2021-11-22 00:05:48 +01:00
Jean-Paul Chaput 0f636912e0 Support more configuration 1G_xM1_1PinM2.
* Change: In Anabatic::NetBuilder::construct(), add support for up to 5 M1
    terminals in calling _do_1G_xM1_1PinM2(). When inserting diodes on
    long wires, when there is not enough space underneath, they may end
    up gouped at an end.
2021-11-16 00:28:43 +01:00
Myrtle Shah 5b5922096a Fix 'static assertion failed: comparison object must be invocable as const'
Signed-off-by: Myrtle Shah <gatecat@chipflow.io>
2021-10-30 13:50:44 +01:00
Las Safin 6e5c03434a Adapt Nix code to Python 3 switch.
This commit also reduces the diff by not removing
some (unnecessary) error handling.
2021-10-26 20:10:59 +00:00
Jean-Paul Chaput 66361fcf3d Correct catastrophic memory bloat in Anabatic::layerAssign() step.
* Bug: In Anabatic::_desaturate(), the set of invalidated GCells was never
    cleared between iterations of desaturated GCells. This was not a
    memory leak per se because, in the end, the set was freed. But it did
    induce a gigantic bloating in memory. This finally explain the strange
    slow down in that stage.
      Detected in ls180+cmos45.
* Change: In Anabatic::GCell, add a flag for each depth to avoid
    desaturating twice the same GCell (maybe not needed now that the
    bug is corrected, but it ensure a no-looping).
2021-10-07 00:48:47 +02:00
Jean-Paul Chaput 61ab4b0da6 Cleanup of CMake, again. 2021-10-01 19:29:29 +02:00
Jean-Paul Chaput 0d473e18c0 Fix crash in Anabatic::AntennaProtect.
* Bug: In Anabatic::AntennaProtect, if the diode cell exists *but* the
    maximum wire length for a diode is *not* defined (so zero) cancel
    the diode protection instead of making a divide by zero.
2021-09-30 19:59:28 +02:00
Jean-Paul Chaput 02777e127e Migration towards Python3, first stage: still based on C-Macros.
* New: Python/C++ API level:
  * Write a new C++/template wrapper to get rid of boost::python
  * The int & long Python type are now merged. So a C/C++ level,
    it became "PyLong_X" (remove "PyInt_X") and at Python code
    level, it became "int" (remove "long").
* Change: VLSISAPD finally defunct.
  * Configuration is now integrated as a Hurricane component,
    makes use of the new C++/template wrapper.
  * vlsisapd is now defunct. Keep it in the source for now as
    some remaining non essential code may have to be ported in
    the future.
* Note: Python code (copy of the migration howto):
  * New print function syntax print().
  * Changed "dict.has_key(k)" for "k" in dict.
  * Changed "except Exception, e" for "except Exception as e".
  * The division "/" is now the floating point division, even if
    both operand are integers. So 3/2 now gives 1.5 and no longer 1.
    The integer division is now "//" : 1 = 3//2. So have to carefully
    review the code to update. Most of the time we want to use "//".
    We must never change to float for long that, in fact, represents
    DbU (exposed as Python int type).
  * execfile() must be replaced by exec(open("file").read()).
  * iter().__next__() becomes iter(x).__next__().
  * __getslice__() has been removed, integrated to __getitem__().
  * The formating used for str(type(o)) has changed, so In Stratus,
    have to update them ("<class 'MyClass'>" instead of "MyClass").
  * the "types" module no longer supply values for default types
    like str (types.StringType) or list (types.StringType).
    Must use "isinstance()" where they were occuring.
  * Remove the 'L' to indicate "long integer" (like "12L"), now
    all Python integer are long.
* Change in bootstrap:
  * Ported Coriolis builder (ccb) to Python3.
  * Ported Coriolis socInstaller.py to Python3.
  * Note: In PyQt4+Python3, QVariant no longer exists. Use None or
    directly convert using the python syntax: bool(x), int(x), ...
    By default, it is a string (str).
* Note: PyQt4 bindings & Python3 under SL7.
  * In order to compile user's must upgrade to my own rebuild of
    PyQt 4 & 5 bindings 4.19.21-1.el7.soc.
* Bug: In cumulus/plugins.block.htree.HTree.splitNet(), set the root
    buffer of the H-Tree to the original signal (mainly: top clock).
      Strangely, it was only done when working in full chip mode.
2021-09-19 19:41:24 +02:00
Las Safin dcc0e6aebf
include/coriolis -> include/coriolis2 2021-08-27 16:15:28 +00:00
Las Safin 72b46d7802
katana 2021-08-27 14:36:23 +00:00
Las Safin 4dff6fd6c3
etesian and anabatic 2021-08-27 14:26:33 +00:00
Jean-Paul Chaput 68d957fe3a Prevent wires part of a diode cluster to be moved up.
Protections diodes may not be able to play their role if they are
separated from their cluster by upper level layers (METAL4/METAL5).
This seems not to diminish the total number of diodes.

* New: In Anabatic::NetData, add a set of non move up segments in
    the object. To tag global wires that are part of a cluster.
* New: In Anabatic::AutoSegment, add support for a SegNoMoveUp
    flag. This flag is propagated through _makeDogleg()	.
      Used in ::canMoveUp() and ::canPivotUp().
* New: In Anabatic::NetBuilder, add NetData to the attributes so
    we can extract the NoMoveUp infomation given by the antenna
    protect stage.
* New: In NetBuilderHV::_do_globalSegment(), lookup NoMoveUp
    information from NetData to put it in AutoSegment.
* New: In AntennaProtect(Net*), flags the RoutingPad clusters wires
    as non movable up.
* New: In AnabaticEngine::breatAt(GCell*), propagate the SegNoMoveUp
    flags. Based on NetData.
2021-06-18 19:17:24 +02:00
Jean-Paul Chaput 72b5de88c4 Fix bugs in AutoSegment::isMiddleStack() and canReduce().
* Bug: In AutoSegment::canReduce(), in the repair stage, segments are
    allowed to go beyond their GCell bondaries, so global segments can
    end up in zero length. So now allow globals less than one P-Pitch
    to be flagged as reduced.
* Bug: In AutoSegment::isMiddleStack(), systematically reject non-canonical
    segment. If it is non-canonical, then is aligned with a canonical one.
    Then we will perform the check on it.
      There seems to be another porblem of update of the length of the
    associated TrackElement, the increase of size of the non-canonical is
    not taken into account. This is enough to prevent the problem to
    arise but we should invsetigate further.
* Hack: In AutoSegment::canMoveUp(), prevent segment id:6378409 to be
    moved up so the last antenna effect is avoided. This is not a clean
    way to do it.
2021-06-17 23:49:54 +02:00
Jean-Paul Chaput 3bd1d56582 Fix last DRC incorrect case in TrackSegment::isMiddleStack().
* Bug: In TrackSegment::isMiddleStack(), formerly, all global segments
    where discarted. But in the routing repair stage, segments can go
    *outside* their GCell boundaries, allowing globals to became of
    null length.
       Hence, for global, we now also check the wirelength.
2021-06-12 16:21:10 +02:00
Jean-Paul Chaput 7c8d47a2d1 More generic criterion for finding under minimum area segments.
* Change: In AutoSegment::isMiddleStack(), after checking for obvious
    non-candidates, relies on axis-to-axis wirelength instead of topological
    criterions. We will not be able to account all the topologies that
    may cause problem. So consider every segment whose length is below
    one perpandicular pitch.
2021-06-11 11:46:13 +02:00
Jean-Paul Chaput 79858840fc In NetBuilderHV::_do_xG_1M1(), less rigid topology for straight vertical. 2021-06-10 15:29:00 +02:00
Jean-Paul Chaput dd49a185af Compensate diodes between RP clusters & wire clusters.
In Anabatic::AntennaProtect, when we cannot insert enough diodes
under a wire cluster. Which makes it likely very long and over an
area where diodes cannot be inserted (chip border close to I/O pads
or over a macro-block). Request extra diode insertion on it's
connecting RoutingPad clusters.

* New: In Anabatic::DiodeCluster, add a "forced diode" counter for
    extra diodes inertions. Only used in the DiodeRps derived class.
* New: In Anabatic::DiodeCluster, add support for a cluster to know
    it's neighbors. Stored as indexes of the table being built in
    Anabatic::antennaProtect(Net*).
* New: In Anabatic::antennaProtect(Net*), when builing the WireCluster,
    also find it's neigbors. Store the index of the cluster a segment
    belongs to in clusterSegments.
2021-06-08 12:19:40 +02:00
Jean-Paul Chaput 5f60767486 In AutoSegment::expandToMinLength(), ensure that we stay on foundry grid 2021-06-08 12:19:08 +02:00
Jean-Paul Chaput 205a6877db More generic H-Tree support to accomodate the LS180 PLL internal clock.
The H-Tree support is now allowed for any net, not only the clocks and
not only top-level nets. This allow to better management of the LS180
internal clock signal.

* New: In Cell::flattenNets(Instance*,set<string>,uint64_t) new overload
    of the function to allow the user to select nets that will *not*
    be flattened. This makes the NoClockFlatten flag effectively obsolete,
    we keep it for backward compatibility.
      The net names can be of non top level ones. In that case, they must
    use the name an HyperNet will get (the Occurrence name). For example:
         "instance1.instance2.deep_net_name".
* New: In PyCell, update the wrapper for the new parameter of flattenNets(),
    new utility function pyListToStringSet() to translate a Python list into
    a C++ set of names.
* New: In EtesianEngine, add support for a list of nets to be excluded
    from the flattening procedure. Those excluded nets will also be
    excludeds from the Coloquinte nets *and* HFNS synthesis, as they
    are likely to be manageds by a H-Tree.
* Change: In AnabaticEngine::_loadGrByNet(), now also skip nets that are
    flagged as manually detailed route.
* New: In AnabaticEngine::antennaProtect(), do not try to insert diodes
    on nets that are already fixed or detaled route. This replace the
    clock exclusion.
* New: In cumulus/plugins.{block,htree,chip}, replace the concept
    of clock-tree by the more generic H-Tree. That is, we can ask the P&R
    to create H-Tree on any net of the design, not only the ones matcheds
    as clock. The net does not even need to be top-level.
      This is to manage the PLL internal clock generated by the PLL in
    the LS180 chip.
      Start to change all reference to "clock" into "H-Tree".
* Bug: In cumulus/plugins.chip.powerplanes.Builder._connectHTree(),
    there was an inversion of the H & V routing gauges to compute the
    track into which put the H-Tree center to corona edge wiring.
      This was causing tracks to be used twice, seen in the ao68000 test
    bench.
2021-05-31 00:02:23 +02:00
Jean-Paul Chaput d4c3cf7dbb More accurate antenna management in Anabatic.
* New: In Anabatic::DiodeWire, use "antennaDiodeMaxWL" to compute the number
    of diodes to insert in a wire only cluster. Use boxes instead of segments
    to define the area as segments can be splitted by the diodes inserteds
    at the DiodeRps stage.
* New: In DiodeWire::createDiodes(), specific diode insertion method.
    Try to instert first in long horizontal wires.
2021-05-22 15:14:32 +02:00
Jean-Paul Chaput 8ce16add53 Add a "forced halo" to diode clusters.
When a long *horizontal* wire connect to a cluster, an antenna effect
may be created *before* the METAL3 is deposited, if the cluster's diode
is not *directly* connected to the gate through *only* METAL2. So, we
add a "forced halo" where the long horizontal connecting wires will be
broken by a diode *near* the gate. This problem do not occur for long
connecting METAL3, as the diode will be connected by then. Note that
we are hard-coding the gauge routing direction in the algorithm.
  With that modification, only one antenna effect remains in LibreSOC
LS180. May be corrected by post-treatement.

* New: In Anabatic::DiodeCluster::mergeForcedhalo() add specific secondary
    areas where diode must be insterted in addition to the one of the
    RroutingPad cluster. To "isolate" the cluster from long horizontal
    wires.
2021-05-13 12:20:28 +02:00
Jean-Paul Chaput c80e99c0a1 Create clusters for wire only chunks and add diodes if they are too long.
Protecting clusters of sinks is not enough. There can be very long
wires that far exceed the protection capacity of one diode. Instead
of putting a bunch of diodes near the sinks, we choose to put them
regularly along the interconncting wires.
  With this approach we are down to 7 antenna violations on LibreSOC
LS180 test chip.
  This will get less good results on arlet6502 & ao6800 because of the
core being a long way from the I/O pads. Should create jumpers on thoses,
but it is for later.
2021-05-11 14:30:38 +02:00
Jean-Paul Chaput bb5c99247a Complete rewrite of the diode insertion algorithm.
First part of the antenna effect protection : diode insertions.
Anabatic::antennaProtect(Net*) and it's supporting infrastructure
has been rewritten & simplificated. Must be used in conjuction
with the "Flexlib" bloat model of Etesian. A cursory description
of the algorithm has been added in the source file.

* New: GCell::hasNet() to tell if net is going through a GCell,
    either as a straigth wire or has a local GContact (turn,
    branch, terminal).
* New: Etesian::BloatFlexib class (tagged "Flexlib") suited for
    flexlib uses. It is derived from "nsxlib".
      To have enough space to insert all the wanted diodes, we
    enlarge "mx2_x2" & "mx3_x2" of resp. 1 and 2 pitches.
      This is an empiric finding, Yosys seems very fond of thoses
    gates and we often see them underneath area where no space
    was available to put a diode... May need some more fine grained
    analysis.
2021-05-04 19:31:12 +02:00
Jean-Paul Chaput 79f5b3db08 In AutoSegment::canMoveUp(), increase to 2 the added penalty under FlexLib. 2021-04-24 12:55:47 +02:00
Jean-Paul Chaput 493ed1ea11 In AutoSegment::canMoveUp(), adjust balance for FlexLib M2/M4.
* Change: In AutoSegment::canMoveUp(), hard code for FlexLib a track
    reserve of one when trying to move up.
      In FlexLib, the router promotes too easily METAL2 towards METAL4,
    clogging the higher level. So we end up with the METAL2 level
    under-saturated and the METAL4 over saturated, leading to routing
    failures.
      Now we assume that there is "one track less available" in METAL4.
      As for now, solves the problem for LibreSOC.
2021-04-21 13:49:41 +02:00
Jean-Paul Chaput 2084a3bde2 Bad computation of the track axis for fixed in NetBuilderHV::_do_xG_1PinM2().
* Bug: In NetBuilderHV::_do_xG_1PinM2(), for METAL2 pins on the EAST
    side, we were computing the track from the XMax position of the
    GCell. Now, with complete discoupling of the routing pitches and
    GCell size, this is most of the time false.
      Replace with a true computation of the last track of routing
    area.
2021-04-18 20:36:44 +02:00
Jean-Paul Chaput 444cc777e5 Fix topological bug in NetBuilderHV::_do_xG_1PinM2().
* Bug: In NetBuilderHV::_do_xG_1PinM2(), when the M2 pin is on the *east*
    side and there are three globals, we must swap htee1 & htee2.
      Otherwise, we the SW/NE contacts do not have the right numbers
    of free segments attach.
* New: In AnabaticEngine::cleanupGlobal(), check that no global component
    is left behind, sure sign that the global to detailed building went
    wrong.
2021-04-17 13:03:15 +02:00
Jean-Paul Chaput 20efd75a32 More accurate detection of zero-length segments.in AutoSegment::canReduce(). 2021-04-15 23:47:21 +02:00
Jean-Paul Chaput 2002282483 Add a zero-length segment compaction stage in Anabatic DTOR.
* New: In AnabaticEngine::_gutAnabatic(), perform progessive compaction
    of segment of null length.
      CAUTION: Reduced segments *may* not be null length segments.
               They are "less or equal" than one perpandicular pitch and
	       can have their layer put into the perpandicular one.
                 They non-null one *must* be excluded for the compaction.
      Null segments are compacted starting from the one connecteds to
   non-null length segments. This is to avoid the compaction starting
   in the middle of a whole set of zero-segments that will block further
   compaction.
     This behavior was causing "zero-length" segment on orphaned layers
   that were causing minumal area DRC errors.
* Change: AutoSegment::canReduce() is modified so it now takes a flag
    argument to tell it to look for collapisble zero-length segments.
* New: AutoSegment::getNonReduceds(): returns the number of non-zero
    length segments connecteds to the current one.
* Change: In AutoSegment::reduceDoglegLayer(), use the perpandicular
    width of the routing layer instead of the regular (parallel) one.
      This was causing DRC errors.
2021-04-12 23:50:25 +02:00
Jean-Paul Chaput a66da90446 Never reduce METAL2 short wires to METAL1.
* Change: In AutoSegment::canReduce(), no longer allow short METAL2
    connected only to VIA12 to be reduced in METAL1, as we do not
    control the METAL1 level of layers. This problem started to
    show when connecting to diodes (antenna).
      Should get rid of METAL1 DRC violations.
2021-04-10 19:51:50 +02:00
Jean-Paul Chaput 3eb3f52bc8 Refining check in AutoSegment::isMiddleStack().
* Change: In AutoSegment::isMiddleStack(), reject configurations where
    we have a Tee in the same direction as the segment. That is, (HTee + H)
    or (VTee + V). It is unlikely that the two segments of the tee will
    be of null size.
2021-04-09 13:54:46 +02:00
Jean-Paul Chaput a2525f2260 More accurate detection of small metal srips for minimum area.
* Change: In AutoSegment::isMiddlestack(), we where previously only
    detecting (turn+turn) or (turn+terminal) topologies. This was
    too restrictive. Added (terminal+XTee) when the tee is perpandicular
    to the segment, for example horizontal + VTee.
      Fix minimal area DRC error in METAL2 for TSMC.
2021-04-07 14:50:42 +02:00
Jean-Paul Chaput 08d1db5dd6 Rewrite support for minimum area metal wires (stacked VIAs).
We use the segments extensions (dxTarget & dyTarget) to enlarge if
needed the segments. This new implementation is completely at
Anabatic level and should not be seen (i.e. managed) at Katana level.

* Change: In AutoHorizontal & AutoVertical, change the semantic of
    getSourceU() and getTargetU(). formerly they where the end
    position of the segment (with extension included), now they
    gives the position of the anchor contacts, that is the axis
    of the perpandiculars.
* New: AutoSegment::getLength() is still a proxy toward the
     Segment::getLength() which returns the length of segment with
     dxSource & dxTarget. We introduce a getAnchoredlength()
     which returns the length between the centers of the S/T
     anchors. That is axis to axis.
       This is this length which is now used througout Anabatic.
* New: In AutoSegment::_extentionCaps, add a fourth item to hold
    the segment minimal length (to respect minimal area given
    the wire width).
* New: In AutoSegment::getExtensionCap(), if the segment has
    a non-zero S/T extension, returns it instead of the S/T
    contact extension *if it is greated*. The check of the
    extension can be disabled by the Flag::NoSegExt flag.
* Change: In AutoSegment::isMiddleStack(), security check on
    the presence of source and targets. More accurate detection
    of perpandicular in "same layer" with a non-zero length,
    So the area is OK, even with a short segment.
* New: AutoSegment::expandToMinLength(), check if a segment is
    under the minimal length and expand it if need be by playing
    with the dxTarget & dxSource. Tag minimal segments with the
    AutoSegment::SegAtMinArea flag. Also try to keep the segment
    *inside* it's former (supposedly wider) interval.
* New: AutoSegment::unexpandToMinLength(), to be called on a
    formerly minimal sized segment which as grown up. Reset
    it's S/T extensions to zero and unset the flag SegAtMinArea.
* Change: In AutoHorizontal::updateOrient(), when the extension
    are non-zero, also swap them if needed, to keep the exact
    footprint of the segment.
* New: In AutoSegment::revalidate(), check that the segment
    respect the minimal length (area), and expand it if needed.
      Conversely, if the segment has grown up from a minimal
    length state, reset it's extensions to zero.
* Change: In Anabatic::Session::revalidate(), invalidateds
    segments are now sorted in such a way that the "middle stack"
    ones are revalidateds last. Not recall 100% why...
* New: In Katana::TrackCost, add a computation of the free interval
    length we are into (if any). Not used yet, keep it for future
    use.
* Change: In KatanaEngine::finalizeLayout(), remove the call to
    segments minimum area protection. It is now obsoleted by the
    new implementation in Anabatic.
* Change: In Track::check(), call the minimum size/area checker
    Track::checkMinArea().
2021-04-05 00:01:54 +02:00
Jean-Paul Chaput 0326d513bd Use the extention cap in Anabatic to ensure the METAL minimum area.
* New: In AutoSegment::getExtensionCap(), when a routing layer has a
    minimal area defined, compute the minimal wire length (given it's
    width). Then, for segments identified as "MiddleStack" (local
    with turns at each end towards opposite layers), if their length
    is below minimal, return a longer extention cap.
      This may be optimized because with this, the segment extension
    is symmetric on both side while it could be made assymetric.
2021-04-01 08:46:02 +02:00
Jean-Paul Chaput 2140737e10 In Anabatic::antennaProtect(), error in computing the diode GCell location. 2021-03-29 19:03:26 +02:00