diff --git a/karakaze/python/analogdesign.py b/karakaze/python/analogdesign.py
index 6d990a24..c2b038c7 100644
--- a/karakaze/python/analogdesign.py
+++ b/karakaze/python/analogdesign.py
@@ -357,27 +357,33 @@ class AnalogDesign ( object ):
         self.parameters.read( path );
 
         for dspec in self.devicesSpecs:
-          if dspec[0] == MultiCapacitor:
-            Cname       = dspec[1]
-            Cparameters = self.parameters.getCapacitor( Cname )
-            if not Cparameters:
-              raise Error( 3, [ 'AnalogDesign.readParameters(): Missing parameters for capacity \"%s\".' % Cname ] )
-              continue
-            dspec[4] = Cparameters.C * 1e+12
-            trace( 110, '\t- \"%s\" : C:%fpF\n' % (Cname ,dspec[4]) )
-          else:
-            Tname       = dspec[1].split('_')[0]
-            Tparameters = self.parameters.getTransistor( Tname )
-            if not Tparameters:
-              raise Error( 3, [ 'AnalogDesign.readParameters(): Missing parameters for \"%s\".' % Tname ] )
-              continue
-            dspec[4] = toLength( Tparameters.W )
-            dspec[5] = toLength( Tparameters.L )
-            dspec[6] =           Tparameters.M
-            trace( 110, '\t- \"%s\" : W:%f L:%f M:%d\n' % (Tname
-                                                          ,dspec[4]
-                                                          ,dspec[5]
-                                                          ,dspec[6]) )
+            if issubclass(dspec[0],TransistorFamily):
+                Tname       = dspec[1].split('_')[0]
+                Tparameters = self.parameters.getTransistor( Tname )
+                if not Tparameters:
+                    raise Error( 3, [ 'AnalogDesign.readParameters(): Missing parameters for \"%s\".' % Tname ] )
+                    continue
+                dspec[4] = toLength( Tparameters.W )
+                dspec[5] = toLength( Tparameters.L )
+                dspec[6] =           Tparameters.M
+                trace( 110, '\t- \"%s\" : W:%f L:%f M:%d\n' % (Tname
+                                                              ,dspec[4]
+                                                              ,dspec[5]
+                                                              ,dspec[6]) )
+            elif issubclass(dspec[0],CapacitorFamily):
+                Cname       = dspec[1]
+                Cparameters = self.parameters.getCapacitor( Cname )
+                if not Cparameters:
+                    raise Error( 3, [ 'AnalogDesign.readParameters(): Missing parameters for capacity \"%s\".' % Cname ] )
+                    continue
+                dspec[4] = Cparameters.C * 1e+12
+                trace( 110, '\t- \"%s\" : C:%fpF\n' % (Cname ,dspec[4]) )
+            elif issubclass(dspec[0],ResistorFamily):
+                print WarningMessage( 'Resistor devices are not supported yet by Oceane parser (instance:"{}").'.format(dspec[1]) )
+            elif dspec[0] == Cell:
+                pass
+            else:
+                print WarningMessage( 'Unsupported analog device type {0} (instance:"{1}").'.format(dspec[0],dspec[1]) )
         trace( 110, '-,' )
         return