diff --git a/vlsisapd/examples/openChams/python/driveOpenChams.py b/vlsisapd/examples/openChams/python/driveOpenChams.py
index 0b9c66a6..00e1d5ff 100644
--- a/vlsisapd/examples/openChams/python/driveOpenChams.py
+++ b/vlsisapd/examples/openChams/python/driveOpenChams.py
@@ -15,7 +15,7 @@ circuit.addParameter(Name("complex"), "myEq")
 netlist = circuit.createNetlist()
 #  instances
 #   nmos1
-inst_nmos1 = netlist.addInstance("nmos1", "Transistor", "NMOS", True)
+inst_nmos1 = netlist.addDevice("nmos1", "Transistor", "NMOS", True)
 inst_nmos1.addConnector("G")
 inst_nmos1.addConnector("S")
 inst_nmos1.addConnector("D")
@@ -25,7 +25,7 @@ tr_nmos1.source = "S"
 tr_nmos1.drain  = "D"
 tr_nmos1.bulk   = "S"
 #   pmos1
-inst_pmos1 = netlist.addInstance("pmos1", "Transistor", "PMOS", True)
+inst_pmos1 = netlist.addDevice("pmos1", "Transistor", "PMOS", True)
 inst_pmos1.addConnector("G")
 inst_pmos1.addConnector("S")
 inst_pmos1.addConnector("D")
diff --git a/vlsisapd/examples/openChams/python/parseOpenChams.py b/vlsisapd/examples/openChams/python/parseOpenChams.py
index 111eb1b2..36643abf 100644
--- a/vlsisapd/examples/openChams/python/parseOpenChams.py
+++ b/vlsisapd/examples/openChams/python/parseOpenChams.py
@@ -1,48 +1,75 @@
+import sys
+
 from OPENCHAMS import *
 
-circuit = Circuit.readFromFile("./inverter.xml")
+def printContents(circuit):
+  print circuit.name
+  # circuit parameters
+  print " + parameters"
+  for param in circuit.parameters.getValues():
+    print " | |", param.key, ":", param.value
+  for param in circuit.parameters.getEqValues():
+    print " | |", param.key, ":", param.value
+  # netlist
+  print " + netlist"
+  #  instances
+  print " | + instances"
+  for instance in circuit.netlist.getInstances():
+    if isinstance(instance, Device): 
+      print " | | +", instance.name, ":", instance.model, instance.mosType, instance.sourceBulkConnected
+    else:
+      print " | | +", instance.name, ":", instance.model
+    print " | | | + connectors"
+    for conn in instance.getConnectors():
+      print " | | | |", conn.key, ":", conn.value.name
+    if isinstance(instance, Device): 
+      print " | | | + transistors"
+      for tr in instance.getTransistors():
+        print " | | | | name:", tr.name, "- gate:", tr.gate, "- source:", tr.source, "- drain:", tr.drain, "- bulk:", tr.bulk
+  #  nets
+  print " | + nets"
+  for net in circuit.netlist.getNets():
+    print " | | +", net.name, ":", net.type, net.external
+    print " | | | + connections"
+    for conn in net.getConnections():
+      print " | | | | %s.%s"%(conn.instanceName, conn.connectorName)
+  # schematic
+  if (circuit.schematic):
+    print " + schematic - zoom:", circuit.schematic.zoom
+    for instance in circuit.schematic.getInstances():
+      print " | name:", instance.key, "- x:", instance.value.x, "- y:", instance.value.y, "- symmetry:", instance.value.symmetry 
+  # sizing
+  if (circuit.sizing):
+    print " + sizing"
+    for op in circuit.sizing.getOperators():
+      print " | + instance name:", op.key, "- operator:", op.value.name, "- simulModel:", op.value.simulModel, "- callOrder:", op.value.callOrder
+      for constraint in op.value.getConstraints():
+        print " | | + param:", constraint.key, "- ref:", constraint.value.ref, "- refParam:", constraint.value.refParam, "- factor:", constraint.value.factor
+    print " | + equations"
+    for eq in circuit.sizing.getEquations():
+      print " | |", eq.key, ":", eq.value
+  # layout
+  if (circuit.layout):
+    print " + layout"
+    for inst in circuit.layout.getInstances():
+      print " | | instance name:", inst.key, "- style:", inst.value
 
-print circuit.name
-# circuit parameters
-print " + parameters"
-for param in circuit.parameters.getValues():
-  print " | |", param.key, ":", param.value
-for param in circuit.parameters.getEqValues():
-  print " | |", param.key, ":", param.value
-# netlist
-print " + netlist"
-#  instances
-print " | + instances"
-for instance in circuit.netlist.getInstances():
-  print " | | +", instance.name, ":", instance.model, instance.mosType, instance.sourceBulkConnected
-  print " | | | + connectors"
-  for conn in instance.getConnectors():
-    print " | | | |", conn.key, ":", conn.value.name
-  print " | | | + transistors"
-  for tr in instance.getTransistors():
-    print " | | | | name:", tr.name, "- gate:", tr.gate, "- source:", tr.source, "- drain:", tr.drain, "- bulk:", tr.bulk
-#  nets
-print " | + nets"
-for net in circuit.netlist.getNets():
-  print " | | +", net.name, ":", net.type, net.external
-  print " | | | + connections"
-  for conn in net.getConnections():
-    print " | | | | %s.%s"%(conn.instanceName, conn.connectorName)
-# schematic
-print " + schematic - zoom:", circuit.schematic.zoom
-for instance in circuit.schematic.getInstances():
-  print " | name:", instance.key, "- x:", instance.value.x, "- y:", instance.value.y, "- symmetry:", instance.value.symmetry 
-# sizing
-print " + sizing"
-for op in circuit.sizing.getOperators():
-  print " | + instance name:", op.key, "- operator:", op.value.name, "- simulModel:", op.value.simulModel, "- callOrder:", op.value.callOrder
-  for constraint in op.value.getConstraints():
-    print " | | + param:", constraint.key, "- ref:", constraint.value.ref, "- refParam:", constraint.value.refParam, "- factor:", constraint.value.factor
-print " | + equations"
-for eq in circuit.sizing.getEquations():
-  print " | |", eq.key, ":", eq.value
-# layout
-print " + layout"
-for inst in circuit.layout.getInstances():
-  print " | | instance name:", inst.key, "- style:", inst.value
+def usage():
+    print "usage:", sys.argv[0], "[filename]"
+    sys.exit(48)
+
+def main():
+  if len(sys.argv) == 1:
+    filename = "./inverter.xml"
+  elif len(sys.argv) == 2:
+    filename = sys.argv[1]
+  else:
+    usage()
+
+  circuit = Circuit.readFromFile(filename)
+  printContents(circuit)
+
+
+if __name__ == "__main__":
+  main()